Electronics, microelectronics, nanoelectronics, … Part III

1. Electronics, microelectronics, nanoelectronics, …Part III Mizsei, Jánoswww.eet.bme.hu

2. Outline • the MIT effect • MIT resistorasmemristor • new thermal-electric device (phonsistor) and the • (CMOS compatible) thermal-electric logic circuit (TELC) • nanosized CMOS versus TELC • analogybetweenneurons and TELC • somemeasuredresults (thermal OR and ANDgate) • S/W analysis

4. VO2 thin films: practice and ideas Ceramics with some functionality: Metal-insulator(semiconductor)-transition: VO2 Technology: Pulsed Laser Deposition (PLD): - XeCl-excimer laser - in situ deposition, RT deposition, and RTA heat treatments Pulsed Laser Deposition (PLD) technique and an ablation plume of VO2 thin film deposition.

5. Metal-Insulator-Transition (MIT) VO2 thin films: MIT effect Optical and electrical switching characteristics of MIT effect induced by Joule-heating method. Very high optical density films with T(l)≈ 0 @ 1550 mm in metal state(red line).

6. MIT memristiveeffect resistor: no memory, ohmic capacitor: chargememory inductor: currentmemory memristor: chargememory, ohmic

7. Applications • (New) functional device by thermal coupling (phonon coupler, phonsistor). Properties of thephonsistor: • - active device - ohmic input and - thyristor-like output characteristics - it saves the output state Iout Iin VinIin Vin Vout Ballistic transport, thermalisation in the SMT: Input power: P=VinIin

8. ballistic transport of electrons through the metal base minority carrier diffusion Bipolar transistor and metal base transistor analogy

9. Applications • New functional device by mutual thermal coupling (reciproque phonsistor). • New functional logic cell by mixed thermal coupling Iout Iin VinIin VoutIout Vout Vin Output(s), controlled by input(s), but they can control each other too Input(s), independent from each other VO2 Input (?) VO2 Output (?) VO2 VO2 Properties: • active device (thyristor-like characteristics), • it saves both input and output states - symmetric (symmetry depends on size of the resistors) • and “reciproque” (“input” can be switched on from the “output”, too) ! • the output conditions can be seen from the input side, too ! Thermally coupled logic (TCL) next slides!

10. Electro-thermal integrated circuit: basic concept (TCL: thermally coupled logic)

11. Electro-thermal integrated circuit: basic concept (TCL: thermally coupled logic) • OR gate: (three input) • AND gate: • Complex (AND OR) gate: Thermal diffusion length VO2 Input(s) VO2 (VO2) Output

12. Patent (phonsistor, thermal-electric integrated circuit) submitted to the Hungarian Patent Office by the Budapest University of Technology and Economics

13. Thermal diffusivity: In heat transfer analysis, thermal diffusivity (symbol: a ) is the ratio of thermal conductivity to volumetric heat capacity. where: •   : thermal conductivity (SI units: W/(m K) ) •   : volumetric heat capacity (SI units: J/(m3K) ) •   : density (SI units: kg/(m3) ) •   : specific heat capacity (SI units: J/(kg K) ) Thermal diffusion length (characteristic lenght at given time scale): a~10-6m2/s (SiO2), time is 10-10 sec, than Lth=10-8 m (10nm) a~6x10-5 m2/s (Si), time is 10-10 sec, than Lth=7x10-8 m (70nm)

14. Electro-thermal integrated circuit: a bit more… Power supply • Electrical coupling: NOR • Thermal coupling: OR Pull up resistor VO2 1 0 (low voltage level) Input(s) VO2 Output Iout Pull up resistor loadline Two, stable operating points VinIin 1 (high temperature level) 1 Practical realisation:vertical (three dimensional thermal IC, possibly stacked, see more later)

15. Electro-thermal integrated circuit: thermal transmission line with three OR/NOR input Power supply Output 1 propagation of the thermal „1” state, signal regeneration

16. Some ideas for practical realisations: Vertical (three dimensional thermal IC), cross section: OR AND OR OR Cu, or carbon nanotubes: thermal ground for thermal separation Cu, or carbon nanotubes: thermal ground for thermal separation Thermal diffusion length VO2 VO2 VO2 SiO2 , thermal and electrical isolator Silicone (with conventional CMOS integrated circuit)

17. „Nothingbeatsscaledsiliconbutnanotechnologycancomplement”

18. Some ideas for practical realisations: CMOS compatibility Vertical (three dimensional thermal and CMOS IC), cross section: CMOS IC

19. Some ideas for practical realisations:real size and scalability ITRS (roadmap) 11 nm — approx. 2015 Phonsistorsize:

20. Problemswith CMOS: typicalsurfacedevice Phonsistor: simplebulkdevice • device limits (6 or even more interfaces) • scale downlimits: depletion layers, gate-tunnel current -> direct tunnel distance: 2 nm) with less number of interfaces scale downlimits: tunnel current, sizeeffecton MIT

21. (power delay product), PDP: energy, related to transfer, store or process of one bit [J/s] fJ aJ one bit, two stable state better chip cooling CMOS CNT TELC kT Ptd=W > kT ln2thermodinamics Ptdtd =DEDt > h/2pHeisenberg relation

22. product for thermal electric gate Energyforheatingtheenvironment + heatingthe MIT elementitself + heatforphasetransiton where: thermal diffusion length (characteristic lenght at given time scale, SI units: m, value: ~10-8 m for 10 GHz densityof theenvironment (SiO2) and MIT material, respectively, SI units: kg/(m3) , value: 2650, 4600 specific heat capacityof theenvironment and MIT material, respectively, SI units: J/(kg K) 703 , 340-> 770 specificlatentheat, SI units: J/(kg), value: 51410 characteristicsize of the MIT device, value: 10-8 m (10 nm)

23. product (aJ) for thermal electric gate Energy for heating the environment + heating the MIT element itself + heat for phase transiton aJ product (aJ) for CNT: ~400 product (aJ) for CMOS: 50-500-1000

24. Thermal electric logic circuit in the „gap” Thermal-electric logic

25. The “secret” of the huge performance of the human brain (after J. von Neumann, Neumann Janos) is, that it is analogue: higher excitation – higher response it is digital: certain combination of excitations -> response it is parallel: certain combination of excitations -> response it is sequential: two (or more) subthreshold excitation within recovery time -> response (sequential AND function) …depending on the given job!

26. Electro-thermal integrated circuits (systems) are: Iout Iin Iin • analogue: higher excitation – higher response • digital: certain combination of excitations -> response • paralel: certain combination of excitations -> response • sequential: two or (more) subthreshold excitation • within recovery time (thermal time constant) -> response (memristor) Vin Vout Combination network: (AND OR) gate sequential: (AND) gate …depending on the given job and timing!

27. Electro-thermal integrated circuit: a bit more… • Electrical coupling: NOR (for longer distances too) • Thermal (diffusion) coupling: OR (for the next gate only) chemical coupling (diffusion of ions) 1 0 (low voltage level) 1 (high temperature level) 1 electrical coupling (for longer distances too)

28. Electro-thermal integrated circuit: a bit more… gate with three inputs chemical coupling (diffusion of ions) thermal transmission line even with an additional input electrical coupling (for longer distances too)

29. Electro-thermal integrated circuit: even more… gatewiththreeinputs hormon release into the intercellular liquid heat emission slow diffusion of hormons thermaldiffusionbetweennon-contactedgates (subsystemsorsystems) chemical couplingbetweennon-contactedcells

30. Electro-thermal integrated circuit: even more… gatewiththreeinputs and lightexcited MIT effect lightexcitation retine heat emission thermaldiffusionbetweennon-contactedgates (subsystemsorsystems) different coupling possibilities (thermal, electrical, optical): easy communication with other kind of systems

31. Experimental results: Nano-size VO2 switch-on U2 U1 U2 off U1 on t<1ms

32. Experimental results: thermal – electronic logic gates V1 V4 V2 V3 „CLOCK” V1in V2in V3out V4clock AND OR

33. Nanosized experimental TELC gate (planned)

34. Nanosized experimental TELC gate (realised) Temperature C

35. SWOT „Strength” • - extremely simple structure („bulk” resistors with common bottom electrodes, onlytwointerfaces) • - bettertoleranceagainstradiation - less physical limits considering the scaling down (10nm) • - compatible with the recent IC technology „Weaknesses” - thermal dissipation and - cooling and temperature stabilising (thermal management) • a very exact and very sophisticated electro-thermal-logic simulation and new design principles are needed for proper realisation „Opportunities” - easy communication with other part of systems (electrical or thermal coupling to CMOS, optical coupling) - technological flexibility (horizontal, vertical or mixed realisation) -design flexibility (signal paths for all directions-> brain like operation) „Threats” • thereare no dataaboutreliabilityof thethermal-electriccomputing • thethermaltransportat nm scale is stillunknownfield

36. Thank You for your attention! www.eet.bme.hu