1 / 6

SoLID DAQ / electronics test plan

SoLID DAQ / electronics test plan. Short term plan. Must Trigger FADC test : Test waveform readout ( Bob , Alex ) Calorimeter trigger preliminary design ( Alex , Electronics group , ? ) APV25 max rate INFN ( Alex , ? ) SRS (Alex, Kondo, Mitra , Jones)

aleda
Download Presentation

SoLID DAQ / electronics test plan

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. SoLID DAQ / electronics test plan

  2. Short term plan • Must • Trigger FADC test : • Test waveform readout ( Bob , Alex ) • Calorimeter trigger preliminary design ( Alex , Electronics group , ? ) • APV25 max rate • INFN ( Alex , ? ) • SRS (Alex, Kondo, Mitra, Jones) • SIDIS rates : EC LC GEM ( Zhiwen, Michael, Ole ) • MaPMT EC test ( Rakitah, Yuxiao , Zhiwen )

  3. Long term plan • Test trigger logic and FADC performance • Simulation digitization • SIDIS GEM occupancy from G4 full MC • SIDIS rates from G4 simulation full MC • MRPC development custom electronics • L3 reduction factor and ressourceneed test algorithm

  4. MaPMT test • Test optical cross talk between pixel • Linearity with DC current • Test linearity with FADC

  5. MaPMT drawback • Optical cross talk ( highly dependent on mechanical design of coupling ) • Electronic crosstalk • Gain non uniformity ( could compensate with FADC but signal has to be out ) • Pixel with higher rate might drive gain • Mechanical coupling difficult

  6. Longer term • FADC system UVA / Temple / WM /Duke ( about 30 K$ worth electronics each should be able to borrow FADC,TI,SD need VXS crate 15K$ and CPU 3.5 K$ ) • Temple : • Define and test FE maybe adapt base for optimization with FADC ( signal shape ) • UVA : realistic response of trigger with detector • Beam test

More Related