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UNH InterOperability Lab. Serial ATA (SATA) Clause 8: OOB and Phy Power States. Presentation Topics. Interface Power States Asynchronous Signal Recovery OOB and Signature FIS return Power-On Sequence State Machine. Interface Power States.
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UNH InterOperability Lab Serial ATA (SATA)Clause 8: OOB and Phy Power States
Presentation Topics • Interface Power States • Asynchronous Signal Recovery • OOB and Signature FIS return • Power-On Sequence State Machine
Interface Power States • Serial ATA interface power states are controlled by: • The device • The host controller • There are three Interface Power States (see table on next slide)
Asynchronous Signal Recovery • Is optional • Phys may support ASR for applications where the usage model of device insertion into a receptacle (power applied at the time of insertion) does not apply
Asynchronous Signal Recovery • What happens: • When a signal is lost, both the host and device can attempt to recover it • Loss of signal can be determined by the host or device. • Loss of signal is represented as a transition from PHYRDY to PHYRDYn (associated with entry into states LS1: NoCommErr or LS2: NoComm within Link Layer)
Asynchronous Signal Recovery • What happens (continued) • Note: negation of PHYRDY does not always mean a loss of signal • Recovery of signal is associated with exit from state LS2: NoComm • Either the device or host will attempt to recover the signal
Asynchronous Signal Recovery • Device: • If the device attempts to recover the signal before the host, it will issue a COMINIT • The device will return its signature following completion of the OOB sequence which included COMINIT
Asynchronous Signal Recovery • Host: • If a host supports ASR, upon receiving an unsolicited COMINIT from the device, it will issue a COMRESET (to the device) • Note: • Unsolicited COMINIT: A COMINIT that was not in response to a preceding (immediately before) COMRESET
Asynchronous Signal Recovery • Host: • When COMRESET is sent to the device in response to an unsolicited COMINIT: • Host shall set Status register to 7Fh • Host shall set all other Shadow Command Block Registers to FFh • When COMINIT is received in response to COMRESET (associated with entry into state HP2B:HR_AwaitNoCOMINIT) • Shadow Status register value shall be set to FFh or 80h to reflect that a device is attached
Unsolicited COMINT usage • Informative • Issuing COMRESET to a device causes it to lose software settings • If software settings preservation is supported (SSP), this will not happen • If COMRESET was due to ASR and legacy mode software is in use • Software does not replace lost software settings
Unsolicited COMINT usage • Note: • Issuing a non-commanded COMRESET to the device should be minimized • Want to ensure correct operation with legacy mode software • Avoid inadvertent loss of critical software settings
Unsolicited COMINT usage • Original use was only for when the signal is lost between the host and device • Host (based on Host Phy Initialization Stat Machine) shall assume when receiving an unsolicited COMINIT: • A new device was connected OR • The cable was unplugged and communication was lost to the device
Unsolicited COMINT usage • Proper Host response to an unsolicited COMINIT is to issue a COMRESET • This will put the device into a known state • When device issues an unsolicited COMINIT and the host responds with COMRESET, the software settings of the device could be changed • Legacy mode software might not recover
Unsolicited COMINT usage • The device should only issue an unsolicited COMINIT when: • Phy voltage threshold falls below the minimum value OR • Last resort in error recovery • This will minimize potential exposure to software loss issues
OOB and Signature FIS return • Informative • What happens: • After an OOB sequence • Only if the device recognized COMRESET during the OOB • Happens with devices compliant to older revisions of SATA specification • Result: devices may send a Register – Device to Host FIS with the device signature
OOB and Signature FIS return • Solution: • For compatibility with older devices • Host may ensure a system power-on event • Device always receives a valid COMRESET after power is determined good at the device • Note: hot plug aware software will ensure device always receives a COMRESET on a hot plug event
OOB and Signature FIS return • One specific solution: • Host workaround • Perform following software procedure when determining device presence (on next slide) • Note: other methods for ensuring the device receives a COMRESET in these conditions are possible
OOB and Signature FIS return • Possible Solution:
Power-On Sequence State Machine • Consist of State Diagrams • Specify expected behavior of the host and device Phy from power-on to establishment of an active communication channel
Power-On Sequence State Machine • In states where: • the Phy relies on detection of received ALIGNp primitives OR • comma sequences for state transitions • Phy shall: • ensure accurate detection of received ALIGNp primitives at the compatible signaling rate (continued on next slide)
Power-On Sequence State Machine • Phy shall: • Have adequate implementation safeguards to ensure no misdetection of ALIGNp