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Something about Asymmetry,Happex. Pengjia 2/8/2012. Asymmetry test Diagram. Injector. Counting House. Pockels Cell HV. Helicity Board. Pair Sync. output. Delayed Helicity. QRT. change. MPS. Circular polarization of laser light. Fiber. Undelayed Helicity. Happex Crate.
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Something about Asymmetry,Happex Pengjia 2/8/2012
Asymmetry test Diagram Injector Counting House Pockels Cell HV Helicity Board Pair Sync output Delayed Helicity QRT change MPS Circular polarization of laser light Fiber UndelayedHelicity Happex Crate Helicity Board change Spin of photo-emitted electrons Use undelayedhelicity to generate a DAC signal with a known value of asymmetry Left Arm Happex Crate Moller SIS3801 Scaler Right Arm V2F Compton Happex Crate SIS3801 Scaler Third Arm SIS3801 Scaler
Asymmetry test • The result is consistent between two arm’s happex, scaler and moller • Chao will show the pictures in detail • Still can not understand why it is not consistent during commission between hall A scaler with hall C and moller(hall A scaler,hallC,moller’s signal came from the same V2F)
bcm signal split problem BCM electronic Left HappexCrate Right HappexCrate V2F Left arm Scaler Right arm Scaler 3rd arm Scaler moller Hall C feedback MCC feedback ……
Will reduce asymmetry resolution …. Just connect to 1 happex ADC Copy to 2 happex ADC Copy to 2 happex ADC and 1 V2F Copy to 1 happex ADC and 1 V2F
reflection signal from happex and V2F Use pulser to check reflection from happex reflection from V2F reflection from happex and V2F
Happex DAQ improvement Right now Before Pulling Trigger interrupt 97% of cpu occupy Need to set system clock rate Cpu is easy to crash 18% of cpu occupy Don’t need to set clock rate Cpu is more stable
Linux Happex DAQ Settings Before VXWORKS CPU TCP- IP Server TI FLEXIO Read Flexio Pair Sync control Extract Pair Sync Delay 0.x ms RingBuffer Server QRT pair sync changed? Helicity no Check&PredictHelicity yes Ring Buffer Read HRS TriggerSuperviser Read ADC Write to RingBuffer Timing Board HAPPEX ADC trigger trigger T1,…,T8 trigger CODA Other ROCs & TIs Event Builder Event Recoder MPS *.dat
Linux Happex DAQ Settings Right now VXWORKS CPU TCP- IP Server TI FLEXIO Pair Sync control RingBuffer Server QRT Helicity trigger no yes trigger Ring Buffer Read Read ADC,Flexio HRS TriggerSuperviser BaseLine Write to RingBuffer Timing Board HAPPEX ADC trigger trigger T1,…,T8 trigger CODA Other ROCs & TIs Event Builder Event Recoder MPS *.dat