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Silicon on Insulator

Silicon on Insulator. Advanced Electronic Devices Karthik Swaminathan. Reasons for SOI. Replacement for SOS Need to extend Moore’s Law Commercial Availability of SOI wafers. Advantages of SOI. Reduced Source and Drain to Substrate Capacitance. Absence of Latchup. Lower Passive current.

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Silicon on Insulator

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  1. Silicon on Insulator Advanced Electronic Devices Karthik Swaminathan

  2. Reasons for SOI • Replacement for SOS • Need to extend Moore’s Law • Commercial Availability of SOI wafers

  3. Advantages of SOI • Reduced Source and Drain to Substrate Capacitance. • Absence of Latchup. • Lower Passive current. • Denser Layout  Low cost.

  4. SOI Wafer Fabrication • Bond and Etch Back • SIMOX (Separation by IMplantation Of oXygen) • SIMON(Separation by IMplantation Of Nitrogen)

  5. Oxygen BOX heat SIMOX SIMOX silicon

  6. Fully Depleted (FD) SOI • This is what you expect. • FDSOI MOSFET • Depleted channel. http://www.soisic.com/SOI_keys_benefits.htm

  7. Partially Depleted (PD) SOI • What if active Si layer is thick ? • Body in channel floating  Floating body effect. http://www.soisic.com/SOI_keys_benefits.htm

  8. Is SOI just in the textbooks ?

  9. Novel SOI Devices • Dual gate SOI. • SOI Single electron transistors.

  10. Double-Gate SOI MOSFET • ITRS roadmap – dual gate SOI at 15nm. • Thick gate oxide to ensure equal thickness on both sides. IEEE Tran on Elec. Dev. 50,3,March 2003,Ultimately Thin Double-Gate SOI MOSFETs Thomas Ernst et al.

  11. Issues – Negative resist for EBL • PMMA resist is a good positive resist for EBL. • Do we have a good negative EBL resist  high resolution. • NO  alternate techniques.

  12. Negative Resist – SOI ? • EBL. • Plasma oxidation. • Etching of amorphous silicon. • BOX removal.

  13. Negative resist – silicon ? • EBL • Plasma oxidation • Electron cyclotron resonance chlorine etching of silicon.

  14. SOI SET

  15. TEM image of trenches

  16. AFM image of SET

  17. Conductance Oscillations Vds = 10mV

  18. SET by pattern dependent oxidation

  19. Pattern dependent oxidation

  20. Pattern dependent oxidation • Thermal gate oxidation. • Oxygen diffuses through the BOX and reaches the pattern edges which are oxidized. • Stresses due to volume change prevent oxidation of the island.

  21. Conductance Oscillations Ld=50nm Vds = 1mV

  22. Conductance Oscillations Ld=70nm Vds = 1mV

  23. Conductance Oscillations Ld=100nm Vds = 1mV

  24. Gate capacitance vs Ld

  25. Summary • Future devices will involve SOI. • SOI provides certain benefits over bulk CMOS for smaller gate lengths. • SOI SETs may become a promising technology in the future.

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