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U vs. L Layout Issues: How should we proceed toward a determination?. (An open-ended discussion with random slides attached…). OUTLINE: Layouts Common Issues / Distinguishing Issues U-Shape L-Shape (Si and Si+Diamond ) How to Proceed. How to Proceed? (1).
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U vs. L Layout Issues:How should we proceed toward a determination? (An open-ended discussion with random slides attached…) OUTLINE: • Layouts • Common Issues / Distinguishing Issues • U-Shape • L-Shape (Si and Si+Diamond) • How to Proceed
How to Proceed? (1) • Work Package I – Finalize ‘Strawman’ layout • Contribute ideas (by 25th January) • Study selected layouts with parametric simulation • Study selected layouts with full simulation • Contribute engineering cartoons • Thermal simulations • Foil R&D assessment • Impact on electronics design • Plus • CAD drawings, cooling options, RF shield studies, physics impact of design variations (SU) • Addition of hybrid geometry option (SU) • Work Package II – CO2 vs LN2 cooling choice • Specify baseline CO2 solution • Specify baseline LN2 solution • Risk Assessment (…From Paula’s survey) R. Mountain, Syracuse University
Possible Layouts (Jan) cartoon VELO L-Shape Layouts and Others – Marco Gersabeck -velo.upg.100119 R. Mountain, Syracuse University
Comparison (Marco) VELO L-Shape Layouts and Others – Marco Gersabeck -velo.upg.100119 R. Mountain, Syracuse University
Distinguishing Issues? U-Shape L-Shape • Sensor Periphery: • Active area close to R7.0 only in H direction – limited by ASIC size • RF Foil: • Design close to current – so AlMg3 possible • Can pursue composite, but we have a fallback • Cooling: • Has 10 chips • Sensor Periphery: • Can get active area closer to R7.0 in both H,V – principal physics reason for L-shape • RF Foil: • Must be a new design • Must be new material – can’t be AlMg3 • This is a strategic gamble • Cooling: • Has 12 chips • Many of these differences erased by using Diamond R. Mountain, Syracuse University
Common Issues? (1) • Physics: • Simulation of efficiency, resolution, coverage, etc. • A given, not detailed here but the questions are well known • Also, material effects, number and spacing of stations vis-à-vis U vs L, etc. • ASIC: • What is the ultimate size of the ASIC? • How much modification is needed • How many submissions can be made, given time constraints • Sensor Periphery: • Silicon limited by rad damage to R7.0 at closest, but guard ring of ~0.5 mm moves active region back to R7.5 • Guard ring of 0.5 mm – feasible? Some questions were raised • Edgeless silicon – R&D stage, what is max size sensor made edgeless? • Note that Diamond will allow recovery to R7.0 • Sensor Size: • Split silicon into two – if sensor/ASIC registration gives low yield • How many ASICs can be accurately bonded to a single sensor? • If split, will introduce either overlaps or gaps in coverage (maybe both) In order of importance (?) R. Mountain, Syracuse University
Common Issues? (2) • Overlap: • Is an overlap (~0.1 mm, 1-2 pixels) necessary? Can gaps be tolerated? Does a staggered layout help? How bad is the effect of the additional material? • Inner Aperture: • Square geometry at inner radius gives no coverage in corners – significant? • RF Foil: • Reduced RL reduces MCS for both cases • Cooling: • Placement of cooling pipes – effect in fiducial volume? • Diamond eases the cooling requirements • ASIC Readout: • Issue of column direction readout rate and multiplicity? – How serious? • Motion Control: • Have to adjust the position in V direction? – raised previously • Other … R. Mountain, Syracuse University
U-Shape (Paula) R. Mountain, Syracuse University
L-Shape (SU: Si only) R. Mountain, Syracuse University
L-Shape (SU: Si+Diamond) R. Mountain, Syracuse University
How to Proceed? (2) What can we determine in the next “two” months? • RF Foil: • Determine if there are any first-order show stoppers, by • Evaluating a realistic L-shape design with CMA • Determining basic material parameters, vacuum-tightness, shielding • Diamond: • Work out U-shaped diamond layout (problem?) • Critical, but can’t prove it in short term… • Simulations: • Continue current work, aim at some killer issue, like… • Thermal: • Continue simulations (kill CO2?), plus <your input here>… • Plus: • Pin down issues related to sensor periphery, size of ASIC, etc. • Seriously evaluate potential of higher-risk technologies, like edgeless silicon, TSVs, etc. • And … I think we can only kill an idea in a two-month period, but we cannot prove it. R. Mountain, Syracuse University