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Flip Chip and Wafer Level Packaging Technology at Hong Kong University of Science and Technology 香港科技大學倒裝焊与晶片級封裝技術的研究

Flip Chip and Wafer Level Packaging Technology at Hong Kong University of Science and Technology 香港科技大學倒裝焊与晶片級封裝技術的研究. Why Flip Chip?. Better manufacturing yield than wirebond for high pin-count chips. 對于高密度引腳芯片，成品率优于丝键合。 Faster manufacturing through-put than wirebond for high pin-count chips.

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Flip Chip and Wafer Level Packaging Technology at Hong Kong University of Science and Technology 香港科技大學倒裝焊与晶片級封裝技術的研究

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  1. Flip Chip and Wafer Level Packaging Technology atHong Kong University of Science and Technology香港科技大學倒裝焊与晶片級封裝技術的研究

  2. Why Flip Chip? • Better manufacturing yield than wirebond for high pin-count chips. 對于高密度引腳芯片，成品率优于丝键合。 • Faster manufacturing through-put than wirebond for high pin-count chips. 對于高密度引腳芯片，生产效率高于丝键合。 • More reliability than wirebonded chips. 可靠性优于丝键合封装芯片。 • Better electrical characteristics (less inductance) for high-speed chips. A must for RF, optoelectronics, high-speed digital (>500MHz). 对于高速芯片，具有良好的电学性能。

  3. More on Why Flip Chip? • Desirable for high-performance Ball Grid Array (BGA) package. 高性能球形焊点阵列封装需要倒装焊。 • Desirable for Chip Size Package (CSP). 芯片尺寸封装技术需要倒装焊。 • The Flipchip bonded wafer market is predicted to grow 37% annually while the overall IC units will only grow 8%. 倒装焊晶片市场预计年增长37%，而整体IC增长仅8%。 • The Flipchip bonded wafer is expected to increase from 3.4 million (2000) to 26.2 million (2005) wafers. 倒装焊晶片预计由三百四十万片(2000年)增长至二千六百二十万片(2005年)。

  4. Forecast on IC Unit IC产量预测(2000-2005) Compound Annual Growth Rate: 8.3% Units (Billion) Year Source: Electronic Trend Publications Inc, 2001

  5. DQ Forecast Bare Die Usage(1999-2004) (Units in Million) Source: Dataquest, April 2001

  6. Year 2000 2001 2002 2003 2004 2005 No. of Bumped Wafers 3.4 6.86 10.4 14.8 20 26.2 Forecast on Bumped Wafers Usage凸点晶片使用预测 (2000-2005) (Units in Million) Source: Dataquest, April 2001

  7. Technology Leaders are Sold on Flip Chip倒装焊在技术领先企业中的应用 • Intel has migrated completely to flip chip bonded BGA for the Pentium 4 product family due to high clock speed and high pin-count (>4000). 鉴于高速和高引脚(>4000)要求，Intel已在奔腾4产品系列中完全采用倒装焊键合的BGA技术。 • The most advanced opto-electronics components from NTT uses flip-chip technology exclusively. 来自NTT的最新光电器件也使用了倒装焊技术 。 • IBM has used flip-chip >30 years. 倒装焊技术已在IBM使用了超过30年

  8. Low Risk and Established Infrastructure低风险和建厂基础 • Well established industrial infrastructure. 良好的建厂工业基础 • Production equipment similar to chip and printer circuit board industries. 生产设备与芯片和印刷电路板工业相近 • Compatible to Surface Mount Technology (SMT). 与表面贴装技术兼容 • Produce smaller and lighter electronic module than wirebonded chips. 生产的电子模块比丝键合小且轻

  9. Flip Chip and Wafer Level PackagingTechnology in HKUST香港科技大學倒裝焊与晶片級封裝技術的研究 • Electroplating solder bumping (Mainstream Flip Chip Technology) 电镀凸点工艺(主流倒装焊凸点技术) • Electroless UBM and stencil printing bumping (Lower cost Flip Chip Technology w/o photolithography and vacuum processing) 化学镀凸点下金属(UBM)和丝网印刷凸点工艺(低成本倒装焊技术 - 不需用光刻和真空制造工艺) • Wafer-Level Input/output Redistribution. 晶片级输入/输出再发布工艺

  10. Commercial Applications商业应用 • For Integrated Circuit Wafer Foundry 集成电路晶片制造厂 • Wafer bumping – advanced integrated circuit chips for high-speed, high input/output counts, and for chips going into advanced packages such as Ball Grid Array (BGA) and Chip Size Package (CSP). 晶片凸点制备：用于高速高输入/输出端口的先进集成电路芯片，及先进芯片封装技术，如球形焊点阵列和芯片尺寸封装. • Redistribution of perimeter I/O (designed for wirebonding) to array I/O for advanced packaging. 先进封装技术中再分布工艺(由周边输入/输出至面分布). • For Packaging and Assembly Foundry IC封装和装配厂 • Assembly of Advanced packages such as Ball Grid Array (BGA) and Chip Size Package (CSP). 先进封装的装配，如球形焊点阵列和芯片尺寸封装.

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