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Assembly Languages & MIPS ISA

Assembly Languages & MIPS ISA. CS465 Lecture 2. Outline. Introduction to assembly languages MIPS instruction set architecture MIPS basic instructions Arithmetic instructions Data transfer instructions Control instructions Logical operations MIPS instruction format

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Assembly Languages & MIPS ISA

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  1. Assembly Languages & MIPS ISA CS465 Lecture 2

  2. Outline • Introduction to assembly languages • MIPS instruction set architecture • MIPS basic instructions • Arithmetic instructions • Data transfer instructions • Control instructions • Logical operations • MIPS instruction format • Encoding/decoding assembly code

  3. Instructions • Instruction Set Architecture (ISA) • An abstract interface between the hardware and software that encompasses all the information necessary to write a correct machine program • The set of instructions that a particular CPU implements • Hardware resources: registers, memory, I/O, … • The set of instructions / primitive operations that a CPU may execute is a major component of ISA • Basic job of a CPU: execute instructions • Different CPUs implement different sets of instructions, e.g: Intel 80x86 (Pentium 4), IBM/Motorola PowerPC (Macintosh), MIPS, Intel IA64, ... • Assembly language is a textual version of these instructions

  4. Assembly Language • Assembly language vs. higher-level language • Few, simple types of data • Does not specify variable type • Simple control flow: goto/jump • Assembly language programming is more difficult and error-prone, it is machine-specific; it is longer • Assembly language vs. machine language • Symbolic representation • When assembly programming is needed • Speed and size (eg. embedded computer) • Time-critical parts of a program • Specialized instructions

  5. Instruction Set Architectures • Early trend was to add more and more instructions to new CPUs to do elaborate operations • VAX architecture had an instruction to multiply polynomials! • RISC philosophy – Reduced Instruction Set Computing • Cocke (IBM), Patterson, Hennessy, 1980s • Keep the instruction set small and simple, makes it easier to build faster hardware • Let software do complicated operations by composing simpler ones • Examples: MIPS, SPARC, IBM PowerPC, DEC Alpha

  6. MIPS Architecture • We will study the MIPS architecture in some detail in this class • MIPS – semiconductor company that built one of the first commercial RISC architectures • Why MIPS? • MIPS is simple, elegant and similar to other architectures developed since the 1980's • MIPS widely used in embedded apps • Almost 100 million MIPS processors manufactured in 2002 • Used by NEC, Nintendo, Cisco, Silicon Graphics, Sony, …

  7. MIPS Arithmetic • All instructions have 3 operands • One destination, two operands • Operand order is fixed (destination first) • Example: C code: a = b + c MIPS code: add a,b,c C code: a = b + c + d; MIPS code: add a, b, c add a, a, d • Design principle: Hardware implementation is simplified via regularity • Operands must be registers in MIPS • Register set of a machine is a limited number of special locations built directly into the hardware

  8. Assembly Variables: Registers • Unlike HLL, assembly cannot use variables • Why not? Keep hardware simple • Different operand locations for different architectures • Stack, register, memory or a mix of them • Every architecture design after 1980 uses a load-store register architecture: ALU operands are all registers; memory can only be accessed with load/store • Advantages of load-store register architectures • Registers are faster than memory • Registers are more efficient for a compiler to use • Drawback: the no. of registers is predetermined • Assembly code must be very carefully put together to efficiently use registers

  9. MIPS Registers • 32 registers in MIPS • Why 32? Design principle: Smaller is faster • Registers are numbered from 0 to 31 • Each register can be referred to by number or name • Number references: $0, $1, … $30, $31 • By convention, each register also has a name to make it easier to code • $t0 - $t7 for temporary variables ($8- $15) • $ra for return address • Each MIPS register is 32 bits wide • Groups of 32 bits called a word in MIPS

  10. MIPS Arithmetic with Registers • MIPS Example • C code: a = b + c MIPS code: add $s1,$s2,$s3 • C code: a = b + c + d; MIPS code: add $t1,$s2,$s3 add $s1,$t1,$s4 • $s0-$s7 conventionally are used for registers that correspond to variables in C/Java programs ($16-$23)

  11. C, Java Variables vs. Registers • In C (and most high level languages), variables declared first and given a type • Example: int fahr, celsius; char a, b, c, d, e; • Each variable can ONLY represent a value of the type it was declared as (cannot mix and match int and char variables) • In assembly language, the registers have no type; operation determines how register contents are treated

  12. MIPS Instructions • Syntax of instructions: op dest, src1, src2 • Op: operation by name • Dest: operand getting result (“destination”) • Src1: 1st operand for operation (“source1”) • Src2: 2nd operand for operation (“source2”) • Each line of assembly code contains at most 1 instruction • Hash (#) is used for MIPS comments • Anything from hash mark to end of line is a comment and will be ignored • Every line of your comments must start with a #

  13. Addition/Subtraction Example • How to do the following C statement? a = b + c + d - e; • Break into multiple instructions • add $t0, $s1, $s2 #temp = b + c • add $t0, $t0, $s3 #temp = temp + d • sub $s0, $t0, $s4 #a = temp - e • Notice • A single line of C code may break up into several lines of MIPS code • May need to use temporary registers ($t0 - $t9) for intermediate results • Everything after the hash mark on each line is ignored (comments)

  14. Constant or Immediate Operands • Immediates are numerical constants • They appear often in code, so there are special instructions for them • Design principle: Make the common case fast • Add Immediate: • C code : f = g + 10 • MIPS code: addi $s0,$s1,10 • MIPS registers $s0, $s1 are associated with C variables f, g • Syntax similar to add instruction, except that last argument is a number instead of a register • How about subtraction? subi?

  15. Constant or Immediate Operands • There is NO subtract immediate instruction in MIPS: Why? • ISA design principle:limit types of operations that can be done to minimum • If an operation can be decomposed into a simpler operation, do not include it • addi …, -X = subi …, X => so no subi • Example • C code: f = g - 10 • MIPS code:addi $s0,$s1,-10 • MIPS registers $s0,$s1 are associated with C variables f, g

  16. Register Zero • One particular immediate, the number zero (0), appears very often in code • So we define register zero ($0 or $zero) to always have the value 0 • Often used to move values or set constant values • f = g (in C) • add $s0,$s1,$zero (in MIPS) • MIPS registers $s0, $s1 are associated with C variables f, g • $zero defined in hardware • Instruction add $zero,$zero,$s0 will not do anything!

  17. Recap • In MIPS assembly language: • Registers replace C variables • One instruction (simple operation) per line • Simpler is better • Smaller is faster • There are no types in MIPS • Types are associated with the instructions • New instructions: • add, addi, sub • New registers: • C variables: $s0 - $s7 • Temporary variables: $t0 - $t9 • Zero: $zero

  18. Store (to) Load (from) Anatomy of a Computer Registers are in the datapath of the processor; program data are in memory, we must transfer them to the processor to operate on them, and then transfer back to memory when done Personal Computer Computer Processor Memory Devices Input Control (“brain”) Datapath Registers Output These are “data transfer” instructions…

  19. 0 8 bits of data 1 8 bits of data 2 8 bits of data 3 8 bits of data 4 8 bits of data 5 8 bits of data 6 8 bits of data ... Memory Organization • Viewed as a large, single-dimension array • A memory address is an index into the array • "Byte addressing" means that the index points to a byte of memory

  20. 0 32 bits of data 4 32 bits of data 8 32 bits of data 12 32 bits of data ... Memory Organization • Bytes are nice, but most data items use larger "words" • For MIPS, a word is 32 bits or 4 bytes • MIPS register holds 32 bits of data • 232 bytes with byte addresses from 0 to 232-1 • 230 words with byte addresses 0, 4, 8, ... 232-4 • Words are aligned: they must start at addresses that are multiples of 4

  21. Specify Memory Addresses • To transfer data, we need to specify: • Register: specify this by number ($0 - $31) or symbolic name ($s0,…, $t0, …) • Memory address: supply a pointer/index to the byte-addressed one-dimensional array • Often, we want to be able to offset from a pointer: e.g. element A[2], date.month • The general format for a memory address offset(base register)specifying • A register containing a pointer to memory • A numerical offset (in bytes) • The desired memory address is the sum of these two values • Example: 8($t0)specifies memory[$t0+8] (byte)

  22. Data Transfer Instructions • MIPS has two basic data transfer instructions for accessing memory lw $t0,4($s3) #load word from memory sw $t0,8($s3) #store word to memory • Load instruction syntax: lw reg1, offset(reg2) • Operator name: lw (meaning Load Word, so 32 bits or one word are loaded at a time) • Reg1: register that will receive the transferred data • Offset: a numerical offset inbytes • Reg2: register containing pointer to memory, called base register

  23. Load Word Example Data flow • Example: lw $t0,12($s0) • This instruction will take the pointer in $s0, add 12 bytes to it, and then load the value from the memory pointed to by this calculated sum into register $t0 • $s0 is called the base register • 12 is called the offset • Offset is generally used in accessing elements of array or structure: base register points to beginning of array or structure

  24. Store Instruction • Also want to store from register into memory • sw: meaning Store Word, so 32 bits or one word are loaded at a time) • Store instruction syntax is identical to Load’s • Example: sw $t0,12($s0) • This instruction will take the pointer in $s0, add 12 bytes to it, and then store the value from register $t0 into that memory address • Remember: “Store INTO memory” Data flow

  25. Example • C code: A[12] = h + A[8];MIPS code: lw $t0, 32($s3) # base addr of array A in $s3 # 1 array element is 4-byte add $t0, $s2, $t0 # h is associated with $s2 sw $t0, 48($s3) # offset=12*4=48 • Can refer to registers by name (e.g., $s2, $t2) instead of number • Store word has destination last • Remember arithmetic operands are registers, not memory! • Can’t write: add 48($s3), $s2, 32($s3)

  26. Pointers vs. Values • Key concept: a register can hold any 32-bit value • That value can be a signed int, an unsigned int, a pointer (memory address), and so on • If you write add $t2,$t1,$t0, then $t0 and $t1 better contain values • If you writelw $t2,0($t0), then $t0 better contains a pointer • Don’t mix these up!

  27. Last hex digit of address 0 1 2 3 0, 4, 8, or Chex Aligned 1, 5, 9, or Dhex Not Aligned 2, 6, A, or Ehex 3, 7, B, or Fhex Notes about Memory • Pitfall: forgetting that sequential word addresses in machines do not differ by 1 • To transfer a word, the sum of the base address and the offset must be a multiple of 4 (to be word aligned) • What if more variables than registers? • Compiler tries to keep most frequently used variable in registers • Less common in memory: spilling

  28. byteloaded …is copied to “sign-extend” x zzz zzzz xxxx xxxx xxxx xxxx xxxx xxxx This bit Loading & Storing Bytes • In addition to word data transfers, MIPS has byte data transfers for characters (char type) • Load byte:lb; store byte: sb • Same format as lw, sw • What to do with other 24 bits in the 32 bit register? • lb: sign extends to fill upper 24 bits • Normally do not want to sign extend chars • MIPS instruction that does not sign extend when loading bytes -- load byte unsigned: lbu

  29. Outline • Introduction to assembly language • MIPS instruction set architecture • MIPS basic instructions • Arithmetic instructions: add, addi, sub • Data transfer instructions: lw, sw, lb, sb, lbu • Control instructions • Logical operations • MIPS instruction format • Encoding/decoding assembly code

  30. C Decisions: if Statements • 2 kinds of if statements in C • if (condition) clause • if (condition) clause1 else clause2 • Rearrange if-else using goto and labels into: if (condition) goto L1; clause2; goto L2; L1: clause1; L2: • Not as elegant as if-else, but same meaning

  31. MIPS Decision Instructions • Decision instructions in MIPS • beq register1, register2, L1 • beq is “branch if equal” • same meaning as: if (register1==register2) goto L1 • bne register1, register2, L1 • bne is “branch if not equal” • same meaning as: if (register1!=register2) goto L1 • Called conditional branches • Can be used to implement complex control-flow constructs for high level langauages

  32. MIPS Goto Instruction • In addition to conditional branches, MIPS has an unconditional branch: j label • Called a Jump Instruction: jump (or branch) directly to the given label without needing to satisfy any condition • Same meaning as: goto label • Technically, it’s the same as: • beq $0,$0,label • Condition always satisfied

  33. (false) i != j (true) i == j i == j? f=g+h f=g-h Exit Compiling C if into MIPS • C code • if (i == j) f=g+h; else f=g-h; • Use mapping: f: $s0, g: $s1, h: $s2, i: $s3,j: $s4 • Final compiled MIPS code: beq $s3,$s4,True # branch i==j sub $s0,$s1,$s2 # f=g-h(false) j Fin # goto Fin True: add $s0,$s1,$s2 # f=g+h (true) Fin: • Note: Compiler automatically creates labels to handle decisions (branches)

  34. Loops in C/Assembly (1/3) • Simple loop in C; A[] is an array of integers do { g = g + A[i]; i = i + j; } while (i != h); • Rewrite this as: Loop: g = g + A[i]; i = i + j; if (i != h) goto Loop; • Use this mapping:g, h, i, j, base of A$s1, $s2, $s3, $s4, $s5

  35. Loops in C/Assembly (2/3) • Original code: Loop: g = g + A[i]; i = i + j; if (i != h) goto Loop; • Final compiled MIPS code: Loop: sll $t1,$s3,2 #$t1= 4*i add $t1,$t1,$s5 #$t1=addr A lw $t1,0($t1) #$t1=A[i] add $s1,$s1,$t1 #g=g+A[i] add $s3,$s3,$s4 #i=i+j bne $s3,$s2,Loop# goto Loop# if i!=h

  36. Loops in C/Assembly (3/3) • There are three types of loops in C: • while • do… while • for • Each can be rewritten as either of the other two, so the method used in the previous example can be applied to while- and for- loops as well • Key concept: though there are multiple ways of writing a loop in MIPS, the key to decision making is conditional branch

  37. Recap • Arithmetic instructions: add, addi, sub • Data transfer instructions: lw, sw, lb, sb, lbu • A pointer is just a memory address, so we can add to it or subtract from it (using offset) • A decision allows us to decide what to execute at run-time rather than compile-time • C decisions are made using conditional statements within if, while, do while, for • MIPS decision making instructions are the conditional branches: beq and bne • MIPS unconditional branch:j

  38. Inequalities in MIPS (1/3) • General programs need to test < and > as well as equalities (== and != in C) • MIPS inequality instruction: slt reg1,reg2,reg3 • “Set on Less Than” • Meaning: • if (reg2 < reg3) reg1 = 1; • else reg1 = 0; • In computereeze, “set” means “set to 1”, “reset” means “set to 0” reg1 = (reg2 < reg3);

  39. Inequalities in MIPS (2/3) • How do we use this? Compile by hand:if (g<h) goto Less; #g:$s0, h:$s1 • Answer: compiled MIPS code… slt $t0,$s0,$s1 # $t0 = 1 if g<h bne $t0,$0,Less # goto Less # if $t0!=0 # (if (g<h)) Less: • Branch if $t0 != 0  (g < h) • Register $0 always contains the value 0, so bne and beq often use it for comparison after an slt instruction • A slt  bne pair means if(… < …)goto…

  40. Inequalities in MIPS (3/3) • Now, we can implement <, but how do we implement >, ≤ and ≥ ? • We could add 3 more instructions, but: • MIPS goal: simpler is better • Can we implement ≤ in one or more instructions using just slt and the branches? • What about >? • What about ≥?

  41. Immediates in Inequalities • There is also an immediate version of slt to test against constants: slti • C loop if (g >= 1) goto Loop Loop: . . . • MIPS loop slti $t0,$s0,1 # $t0 = 1 if # $s0<1 (g<1)beq $t0,$0,Loop # goto Loop # if $t0==0 # (if (g>=1) A sltbeqpair meansif(… ≥ …)goto…

  42. Outline • Introduction to assembly language • MIPS instruction set architecture • MIPS basic instructions • Arithmetic instructions: add, addi, sub • Data transfer instructions: lw, sw, lb, sb • Control instructions: bne, beq, j, slt, slti • Logical operations • MIPS instruction format • Encoding/decoding assembly code

  43. Bitwise Operations • Up until now, we’ve done arithmetic (add, sub,addi ), memory access (lw and sw), and branches and jumps • All of these instructions view contents of register as a single quantity (such as a signed or unsigned integer) • New perspective: view register as 32 raw bits rather than as a single 32-bit number • We may want to access individual bits (or groups of bits) rather than the whole • Two new classes of instructions: logical & shift operations

  44. Logical Operators • Logical instruction syntax: op dest, src1, src2 • Op: operation name (and, or, nor) • Dest: register that will receive value • Src1: first operand (register) • Src2: second operand (register) or immediate • Accept exactly 2 inputs and produce 1 output • Benefit: rigid syntax simpler hardware • Why nor? • nor $t0, $t1, $t2 # $t0 = not ($t1 or $t2) • Immediate operands • andi, ori: both expect the third argument to be an immediate

  45. Mask retaining the last 12 bits Uses for Logical Operators (1/3) • Use AND to create a mask • Anding a bit with 0 produces a 0 at the output while anding a bit with 1 produces the original bit • Example: 1011 0110 1010 0100 0011 1101 1001 1010 0000 0000 0000 0000 0000 1111 1111 1111 0000 0000 0000 0000 0000 1101 1001 1010

  46. Uses for Logical Operators (2/3) • A bit pattern in conjunction with AND is called a mask that can conceal some bits • The previous example a mask is used to isolate the rightmost 12 bits of the bit-string by masking out the rest of the string (e.g. setting it to all 0s) • Concealed bits are set 0s, while the rest bits are left alone • In particular, if the first bit-string in the above example were in $t0, then the following instruction would mask it: andi $t0,$t0,0xFFF

  47. Uses for Logical Operators (3/3) • Similarly effect of OR operation • Oring a bit with 1 produces a 1 at the output while oring a bit with 0 produces the original bit • This can be used to force certain bits to 1s • Example • $t0 contains 0x12345678, then after this instruction: ori $t0, $t0, 0xFFFF • $t0 contains 0x1234FFFF (e.g. the high-order 16 bits are untouched, while the low-order 16 bits are forced to 1s)

  48. Shift • Move (shift) all the bits in a word to the left or right by a number of bits • Example: shift right by 8 bits 0001 0010 0011 0100 0101 0110 0111 1000 0000 0000 0001 0010 0011 0100 0101 0110 • Example: shift left by 8 bits 0001 0010 0011 0100 0101 0110 0111 1000 • 0011 0100 0101 0110 0111 10000000 0000

  49. Logical Shift Instructions • Shift instruction syntax: op dest,reg,amt • Op: operation name • Dest: register that will receive value • Reg: register with the value to be shifted • Amt: shift amount (constant < 32) • MIPS logical shift instructions: • sll (shift left logical): shifts left and fills emptied bits with 0s • srl(shift right logical): shifts right and fills emptied bits with 0s • MIPS also has arithmetic shift instructions that fills with the sign bit

  50. Outline • Introduction to assembly language • MIPS instruction set architecture • MIPS basic instructions • Arithmetic instructions: add, addi, sub • Data transfer instructions: lw, sw, lb, sb • Control instructions: bne, beq, j, slt, slti • Logical operations: and, andi, or, ori, nor, sll, srl • MIPS instruction format • Encoding/decoding assembly code

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