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First results from PADI-2

First results from PADI-2. FEE1. Mircea Ciobanu CBM Collaboration Meeting March 10 –13, 2009 GSI-Darmstadt. Outline. Status of the RPC-Front End Electronics First results of the PADI2 (4ch) prototype: a) Gain, linearity, noise, bandwidth, time over threshold behavior

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First results from PADI-2

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  1. First results from PADI-2 FEE1 Mircea Ciobanu CBM Collaboration Meeting March 10 –13, 2009 GSI-Darmstadt

  2. Outline • Status of the RPC-Front End Electronics • First results of the PADI2(4ch)prototype: a) Gain, linearity, noise, bandwidth, time over threshold behavior b) Timing performance c) Measurements with the TACQUILA3 digitizer d) Crosstalk, Common Mode Rejection Ratio e) Input impedance and reflections • Summary and Outlook

  3. FEE Status (February 2009) • We have prepared 6 PADI1 test plates for tests together with different detectors. In order to have a easy access to NIM-CAMAC systems, 6 interfaces LVDS-PECL are ready for use. • From the tests of PADI1 prototype, we have recognized that the increase of the separation between channels is the main priority. In the new design of PADI2 we have changed the biasing type from voltage to current. We have increased to 4 the number of channels and we have added the OR feature which allows to daisy-chain chips for trigger purposes. We have designed two variants PADI2 and PADI3 which slightly differ in output LVDS levels. • The new ASIC – PADI2,3 was submitted in October 2008 and we have received about 30 pcs. dies. • With the first two samples we performed a basic functionality tests. From this elementary tests we can conclude that all channels are fully operational. • We have designed a test PCB, which is able to be directly connected with our TACQUILA3 Data Acquisition system and the first results will be presented. • We started a detailed technical characterization of the first samples and first results will be presented.

  4. PADI1 Test PCB and the LVDS-ECL adaptor PCB

  5. PADI2 Preamplifier-Discriminator: Block Schematic NEWS

  6. PADI2 is bonded directly on the test PCB

  7. PADI2,3 Test PCB

  8. DC Measurements 1: IDC chip and Power/Channel dependence to REXT Nominal Operating Point for ZIN=50

  9. DC Measurements 2:

  10. Linearity: Pulse Measurement

  11. Time over Threshold behavior

  12. PADI2#1; AC Transmission Measurement PADI2 The nominal working point of the PADI2-PA: GPA=38.8dB, fL=2.8MHz, fH=288MHz with par.: GPAP=37.8dBfL=2.4MHz, fH=215MHz at EOut: GEO=34.5dBfL=2.8MHz, fH=230MHz with par.: GEOP=31.8dBfL=2.4MHz, fH=203MHz fH is about 4 times less then PADI1 case! For what? PADI1

  13. PA-Out Simulations: Corners Nominal working point GPA=87 BW=288MHz GEO=23 BW=255MHz

  14. EOut Simulations:Parasitic, Cornersand nonlinear Load RL is nonlinear : The input impedance of the PCB Q-Buffer is strong nonlinear (1K-100  ) and depends of frequency CL is significant: 4-6pF for PCB traces and 1-3pF for bonding wires. RL Nom.Op.Point GPA=23 BW=255MHz RL

  15. Noise evaluations From PADI2 Noise simulations: Gain Noise at output Noise at input Noise equiv. PA 86.9 2.14mVRMS 24.6µVRMS 3400 e PA with Parasitic 78.2 2.07mVRMS 26.5µVRMS 3780 e

  16. Time resolution for different threshold voltages(tests with pulses having 1.7ns at HM) Channel EOut Offset = -3.2mV Channel EOut Offset = +2mV

  17. Comparison: PADI2 and TACQUILA3 versus PADI1 and TACQUILA3 @ 02.2009 (pulse width- 4ns!) @ 02.2007

  18. Input Reflections: Short Pulse Method IDC=26mA, 3.1mV Cal: Open, 7.48mV 36mA, 2.2mV 46mA, 1.1mV 56mA, 0.25mV Uinp=10mV, Refl=+/-3% TDS 7104 Y Zi=47- 53 Sync Directional Bridge HP8721A Pulse Gen. HP8082A Attenuator -6dB -6dB -30dB D.U.T -6dB Splitter

  19. Crosstalk: Short Pulse Measurementat Qoutput

  20. CMRR: Short Pulse Measurement 2ns Lemo cables: l ~ 220mm Power Splitter non equals length Lemo cables:  l ~ 3.5mm matched for max. CMRR-Ch4 Attenuator Pulse Gen. HP8082A -6dB To Ch.+IN -30dB To Ch.-IN -6dB

  21. Summary - The PADI2 design was successful tested. allchannelsare operational. - PADI2 in connection of with our TAQUILA3 Data Acquisition system works properly. - The first results indicate: Time res.(@10mV) [ps] < 10 Gain ~ 80 ? Bandwidth [MHz] ~ 220 ? Linear range [mV] ~ -10 to 10 CTRR [dB] > 40 CMRR [dB] > 28 Input impedance [] ~ 47 - 53 Power [mW/Ch] ~ 25 Outlook The DC measurements shows a big dispersion of the DC offsets at the output of the PA for different channels(+/-7mV). Probably is due to the low open loop gain of the feedback loop and of the non good match of the involved stages. Can be corrected? In crosstalk measurements was pointed out a influence of the digital part to the analog one; the ground connections inside the chip must be reevaluated. Tests of PADI1-2 with different RPC detectors must be done. The analog outputs are more needed? Connection with the GSI event-driven TDC GET4 prototype must evaluated.

  22. We acknowledge the support of the European Community- Research Infrastructure Activity under the FP6 "Structuring the European Research Area" programme (HadronPhysics, contract number RII3-CT-2004-506078).

  23. Q Calibration

  24. Crosstalk: Short Pulse Measurementat Eoutput

  25. Comparison: The time resolution of all designs

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