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ECE 111, Spring 2014. http://cwc.ucsd.edu/~billlin/classes/ECE111 Professor Bill Lin Office hours: Tu/Th 2:00-3:00pm , 4310 Atkinson Hall TA: Wei Zhao and Guanhong Zhou Office hours: TBD Class: Tu Th 11a-12:20p, PETER 104 No Discussion Sections. Projects.
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ECE 111, Spring 2014 • http://cwc.ucsd.edu/~billlin/classes/ECE111 • Professor Bill Lin • Office hours: Tu/Th 2:00-3:00pm, 4310 Atkinson Hall • TA: Wei Zhao and Guanhong Zhou • Office hours: TBD • Class: Tu Th 11a-12:20p, PETER 104 • No Discussion Sections
Projects • Goal: Learn Verilog-based chip design • Project 1: Simple Fibonacci Calculator • Due 4/17, Pass/No Pass • Project 2: RLE Processor • Due 5/8, Pass/No Pass • Must re-do if not within 20% of average performance • Final Project: SHA1 Security Processor • Due 6/6 (Fri last week), grading on performance
Altera Software • See Software Downloads Page http://cwc.ucsd.edu/~billlin/classes/ECE111/software.php which links to this: http://dl.altera.com/?edition=web • Quartus II Web Edition v13.1 for Windows • Quartus II Software • ModelSim-Altera Edition • Arria II device support
Icarus Verilog • Another simulatorhttp://iverilog.icarus.com • Just runs together with your testbench and prints out whatever is specified in the testbench
More Information • No textbook for this class. Verilog information on class website. Also tutorial examples provided. • This is NOT a lecture-based class. Class time used to talk about Verilog in the beginning, but mostly about project information for the rest of the quarter. • Projects done in teams of 2 students.
Useful Altera Websites • Verilog HDL Basics (50 minutes online course) http://www.altera.com/education/training/courses/OHDL1120 • Demonstration Center http://www.altera.com/education/demonstrations/dem-index.html