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ECE 111, Spring 2012

ECE 111, Spring 2012. http://cwc.ucsd.edu/~billlin/classes/ECE111 Professor Bill Lin Office hours by appointment, 4310 Atkinson Hall TA: Anish Bhayani Office hours: TBD Class: Tu Th 11a-12:20p, PETER 104 No Discussion Sections. Projects. Goal: Learn Verilog-based chip design

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ECE 111, Spring 2012

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  1. ECE 111, Spring 2012 • http://cwc.ucsd.edu/~billlin/classes/ECE111 • Professor Bill Lin • Office hours by appointment, 4310 Atkinson Hall • TA: Anish Bhayani • Office hours: TBD • Class: Tu Th 11a-12:20p, PETER 104 • No Discussion Sections

  2. Projects • Goal: Learn Verilog-based chip design • Project 1: Simple Fibonacci Calculator • Due 4/19, Pass/No Pass • Project 2: WEP Encryption Processor • Due 5/8, Pass/No Pass • Must re-do if not within 20% of average performance • Final Project: SHA1 Security Processor • Due finals week, grading based on performance

  3. Altera Software • Download fromhttps://www.altera.com/download/software/quartus-ii-we • Quartus II Web Edition v11.1 Service Pack 2 for Windows (2.5 GB) • ModelSim-Altera Starter Edition v10.0cfor Quartus II v11.1 Service Pack 2 (13 MB)

  4. Icarus Verilog • Trying it first time for ECE 111http://iverilog.icarus.com • Just runs together with your testbench and prints out whatever is specified in the testbench

  5. More Information • No textbook for this class. Verilog information on class website. Also tutorial examples provided. • This is NOT a lecture-based class. Class time used to talk about Verilog in the beginning, but mostly about project information for the rest of the quarter. • Projects done in teams of 2 students.

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