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IP ’07 Panel: Is networking the solution for interconnect design closure?

IP ’07 Panel: Is networking the solution for interconnect design closure?. Dr. Miloš Krstić. GALAXY project. GALAXY project (GALS InterfAce for CompleX Digital SYstem Integration) will be funded in the FP7 program of EU. Project goals.

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IP ’07 Panel: Is networking the solution for interconnect design closure?

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  1. IP ’07Panel: Is networking the solution for interconnect design closure? Dr. Miloš Krstić

  2. GALAXY project • GALAXY project (GALS InterfAce for CompleX Digital SYstem Integration) will be funded in the FP7 program of EU

  3. Project goals • This project builds on a technology approach in which the EU currently has world leadership • We will provide an integrated GALS NoC design flow • We will provide an interoperability framework between the existing open and commercial CAD tools • The project will evaluate the ability of the GALS approach to solve system integration issues, implement a complex GALS system on 45nm CMOS process, explore the low EMI and low-power properties, and robustness to process variability problems.

  4. GALS and NoC • GALS represents an interesting vehicle for NoC concept Asynchronous wrapper Asynchronous wrapper Req Synchronous block 1 Synchronous block 2 Ack Data Data Network Node Network Node Network Node Synchronous block 3 Asynchronous wrapper

  5. GALS NoCs – Pros/Cons • Pro Clock-skew problems avoided Potentials for power saving (50% power in NoCs is spent to clock net) The synchronous design of NoC nodes at their optimum clock frequency Possibilities for variation-tolerant on-chip interconnection schemes Low-EMI property • Con Lack of convincing analysis and exploration frameworks, crossbenchmarking with synchronous solutions, proven robustness against nanoscale physics effects, tool support

  6. NoC activities in GALAXY project (I) • There are already a few NoC platforms based on the GALS paradigm (Silistix, LETI, Technion, Technical University of Denmark) • We will support a number of GALS NoC architectural solutions • We will also show how the use of NoCs helps designers to overcome the reliability issues of future technologies.

  7. NoC activities in GALAXY project (II) • The full potentials of dynamic voltage and frequency scaling with GALS NoC designs will be explored • We will create a link between high-level tooling for GALS-based system design and the NoC backend synthesis flow, creating with a complete automated synthesis flow for GALS NoCs • A mature synchronous NoC architecture (xpipes) will serve as the reference infrastructure for migration to the GALS paradigm

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