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IceCube DOMMB Firmware

IceCube DOMMB Firmware. Collaboration Meeting Fall 2003 Mons. DOMMB Block Diagram. Programmable Logic. CPLD (lowest level programmable logic device needed) Almost finished. Minor changes needed for mainboard Rev 3 and to make the design more robust. FPGA

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IceCube DOMMB Firmware

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  1. IceCube DOMMB Firmware Collaboration Meeting Fall 2003 Mons Mons Thorsten Stezelberger

  2. DOMMB Block Diagram Mons Thorsten Stezelberger

  3. Programmable Logic • CPLD (lowest level programmable logic device needed) Almost finished. Minor changes needed for mainboard Rev 3 and to make the design more robust. • FPGA Under development (see the following slides) Mons Thorsten Stezelberger

  4. Required FPGA Designs • STF 99% Done for testing • ConfigBoot Preliminary Versionminimal boot • IceBoot Preliminary Versionnormal boot • DOMAPP ~50% Done for data taking For software development purposes the SFT FPGA can be used for the ConfigBoot and the IceBoot FPGAs Mons Thorsten Stezelberger

  5. DOMAPP Block Diagram Mons Thorsten Stezelberger

  6. DOMAPP Status • Data Acquisition ~80% Done • Calibration Sources 0% Done • Local Coincidence 0% Done • Communication Provided by Kalle • Compression 0% Done Estimated time to finish DOMAPP firmware: ~4 weeks Mons Thorsten Stezelberger

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