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Chapter Two Data Manipulation. Computer Science — An Overview J. Glenn Brookshear. Outline. The Central Processing Unit The Stored-Program Concept Program Execution Arithmetic/Logic Instructions Communicating with Other Devices Other Architectures. Turing Machines.
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Chapter TwoData Manipulation Computer Science — An OverviewJ. Glenn Brookshear
Outline • The Central Processing Unit • The Stored-Program Concept • Program Execution • Arithmetic/Logic Instructions • Communicating with Other Devices • Other Architectures
Turing Machines • Turing’s computer design was for theoretical purposes. • It has the three central components: • A processor • A program (instructions for the processor) • A memory (to store the data)
Inside the Computer • Every computer can be broken down into three parts: • CPU (Central Processing Unit) • Memory • I/O (Input/Output) devices:Peripherals Peripherals (monitor, printer, etc.) CPU Memory (RAM, ROM, )
Computer System • Memory Unit • Arithmetic and Logic Unit (ALU) • Control Unit • Input Unit • Output Unit CPU Control Unit ALU Input Unit Output Unit Main Memory Secondary Memory
Input /Output Units • Provide a means of communicating between users and CPU. • What kinds of Input /Output (I/O) Devices are used? • Input • Keyboard, mouse, scanner, bar code reader, touch pad, microphone • Output • printer, monitor, speaker
Central Processing Unit (CPU) • Arithmetic/logic unit (ALU): to perform the arithmetic and logic operation • Control unit: coordinating the machine’s activities • Registers: to store temporary data Figure 2-1
Registers • General-purpose registers • R0,R1,R2,... • Register banks: a set of registers (R0..R7) • Special-purpose registers • Program Counter (PC) • Instruction Register (IR) • Program Status Word (PSW)
The Registers of Computer Workspace R0 General Registers R1 Instructions R2 ... S Special Registers IR PC PSW
Bus • Buses are used to Communicate between the computer components. • Data Bus • Address Bus • Control Bus Control bus Address bus I/O device CPU Memory Data bus
The Operation of Bus • For a device (memory or I/O) to be recognized by the CPU, it must be assigned an address. • The address of every device must be unique. • The CPU puts the address on the address bus, and the decoding circuitry finds the device. • The CPU uses the data bus either to get data form that device or to send data to it. • The control buses are used to provide read or write signals.
Data Bus • The more data buses available, the better the CPU. • An 8-bit bus can send 1 byte a time. • 8 bits (slow), 16 bits, 32 bits, 64 bits (fast). • Data buses are bidirectional. 8 lines for a 8-bit bus
Address Bus • The more address buses available, the larger the number of devices that can be addresses. • Example:8 bits(small), 16 bits, 32 bits, 64 bits(large). • A 16-bit address bus can indicate 216=64K bytes of addressable memory. • Regardless of the size of the data bus. • Address buses are unidirectional.
Capacity of CPU • The address bus and data bus determine the capacity of a given CPU. • The processing power of a computer is related to the size of its buses. • The number of address lines determines the number of locations with which a CPU can communicate. • More data and address buses mean a more expensive CPU and computer.
Machine Clock • One bit is send on a wire in a clock period. • Clock is used to synchronize work of the components on the machine. • Clock decides the performance of the computer. a clock Clock Generator 10 1.4 GHz
Data Transmission • Parallel communication • Several data lines send data together. • Ex: LPT1 sends 8 bits data in parallel • Serial communication • Single data line sends one bit per time unit. • Ex: COM port, USB (Universal Serial Bus) • Note that there needs control lines for the negotiation between two ends.
Data Transmission Rate • bps: bit per second • Kbps, Mbps, Gbps • Example: • PCI bus (32 lines): 33MHz, 132MB/sec • USB: 12 Mbps • modem (modulator-demodulator) • Download: 56 kbps, Upload: 33.6 kbps
How does the Computer Work • Figures 2.2 (or 2.3) is the algorithm (i.e., the list of execution steps) of addition. • How does the computer perform the task? • Processor provides a collection of instructions to perform some basic operations -- instruction set.
Figure 2.2Adding values stored in memory LOAD ADD HALT STORE
Figure 2.3Dividing values stored in memory Conditional Jump DIVIDE
Types of Instructions 1. Data Transfer • get or store data 2. Arithmetic/Logic • perform basic operations (Chapter 2.4) 3. Control • jump or branch
Data Transfer Instruction • Memory Access : copy data from one place to the other • LOAD (memory register)、STORE (register memory)、MOV • See Example: 2-2 • I/O Access
Arithmetic/Logic Instruction • Perform operations on registers to get results (of course, put in the registers) 1. Logical • AND、OR、NOT、XOR 2. Arithmetic • SHIFT、Rotate • ADD、SUB、MUL、DIV • Example 2-2
Control Instruction • Jump or Branch • JUMP • Unconditional jumps and conditional jumps • Unconditional jump: always jump (ex: call a subroutine) • Conditional jump: jump if some requirement is meet (ex: if-else, for-loop) • Example 2-3
Logic Operation -AND Check if bit =1, then we own card A. • AND • AND is used as an mask (network mask, interrupt mask) or a bit map (each bit denotes that we own the object) . 10011010 11001001 10001000 10011010 00000001 00000000 AND AND
Logic Operation - OR • OR • Use 0 to mask the needed bits. 10011010 11001001 11011011 10011010 11110000 11111010 OR OR These 4 bits are those we need.
Logic Operation -XOR • XOR • XOR is used to find the 1’complement. • Exclusive OR 10011010 11001001 01010011 10011010 11111111 01100101 XOR XOR 1’s complement
Logic Operation -SHIFT • SHIFT left • Shift left = 2 • SHIFT right • Shift right = 2 10011010 00110100 10011010 01001101 shift left and insert 0 shift right and insert 0
Logic Operation -ROTATE • ROTATE right: d7...d0 d0d7...d1 • ROTATE left: d7...d0 d6...d0d7 1001101001001101 10011010 01001101
Logic Operation -ROTATE with carry bit • Shift right with carry bit • Shift left with carry bit 1001101011001101 0 carry flag 1 10011010 01001101 1 carry flag 1
Machine Language • How do we communicate with the computer machine ? • Answer: • The coding system • The collection of instructions: Program
Execution in the Computer • Computers provide a collection of instructions (i.e., instruction set). • Programmers write programs (i.e., a list of instructions in some order.) • The computer reads the program and executes the instructions one by one. • The instruction set format is depend on the structure of the computer.
Stored-program Concept • John von Neumann • If the control unit is designed to • extract the program from memory • and execute them, then a computer’s program can be changed merely by changing the contents of the computer’s memory. (Not changing the control unit)
Pseudo Machine • Appendix C • 16 registers (R0 - RF) and S, T,PC, IR • of length 1 byte • 4 bits are used to distinguish R0 - RF • 256 bytes memory • Instruction set • 12 instructions • All instruction occupies 2 bytes of memory.
Some Special Registers • PC points to the next instruction. • IR stores the current instruction to be decoded.
The format of an Instruction 1 3 4 7 Figure 2.5
Instruction of Pseudo Machine Opcode Operand Execution 1 RXY load, Rvalue in address XY 2 RXY load, Rthe value XY 3 RXY store, address XYR 4 ORS move, SR 5 RST add, RS+T R (R0 - RF), S, T: registers
Examples of Instruction • 1347 ; load, R3 value in address 47 • 2347 ; load, R3 value 47H 2. 70C5 ; or, R0 RC or R5 3. B7F3 ; jump to address F3 if R7 = R0 4. B0F3 ; jump to address F3
An Example of Program Step 1: 156C ; load, R5 value in 6C Step 2: 166D ; load, R6 value in 6D Step 3: 5056 ; add, R0R5+R6 Step 4: 306E ; store, address 6ER0 Step 5: C000 ; halt
Program Store in Memory • Our “add” program stored in memory starting at address A0. Figure 2.7
The Machine Cycle • Every instruction in memory is executed by three steps: Fetch Decode Execute • Each instruction has its micro-instruction (or micro-operations). • A micro-operation is an elementary operation that can be performed in parallel during one clock pulse period. • CPU has separate inside units for performing fetch/decode/execution.
Figure 2.6The machine cycle by instruction decoder by ALU