1 / 11

PP2 Status

PP2 Status. F. Bellina. Problem solved. Problem with inhibit and reading temperature and many crazy behavior Solved with a new FPGA firmware:

carina
Download Presentation

PP2 Status

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. PP2 Status F. Bellina

  2. Problem solved.. • Problem with inhibit and reading temperature and many crazy behavior Solved with a new FPGA firmware: the hardware of the newest controller board requires for some digital signals, different signals and different delay. In the FPGA firmware this change was not correctly implemented for all the lines. • Problem with many lost commands Some problem was caused by the way the PVSS sends commands to the ELMB, too many commands and without delay • Problem with reading (all values=0) and -15V missing The problem was caused because the power supply used in SR1 isn’t capable to provide 0,7A for each crate. • Problem with moving trimmer of Regulator 0 board 1 The problem was caused by a bug in the protocol communication inside the ELMB.

  3. ...Next steps 1. Stability: No lost commands, no wrong commands, safe commands when switch On/Off of the power, etc. 2. Speed Reduction of the “commands” from PVSS for a single command, optimizations of the delays, parallelization of commands where possible, • Calibration ? 4. Improve functionalities Watchdog between ELMB and FPGA, use of the ELMB ADC for read values in case of FPGA failure, etc. (next slides for detail)

  4. ...Next steps (Stability) • LOST COMMANDS: • To test if the new controller card (with new firmware) lose command (with old board this happens…1 lost command every 1000-10000 ) • If that happens yet: • Understand where! (PVSS>ELMB>FPGA>REGULATOR BOARDS) • Try to solve and/or decrease the phenomenon. • Find a way for avoid critical situation: Acknowledgement Mechanism Think different way to sends commands (*) (*) if for example the commands are lost between ELMB and FPGA, commands like kill or inhibit can be sent more times (this decrease the possibility of error by 10³ or more each times), or command like move the trimmer by n position, splitted.

  5. ...Next steps (Stability) 2. WRONGS COMMANDS: • In principle this shouldn’t absolutely happen in the new Controller Card. • To test if it’s true, and in case solve the problem! (adding more control in the software communication or solving the hardware problems) 3. SAFE COMMANDS WHEN SWITCH ON/OFF: • To Check if the way the FSM/PVSS switch ON or OFF the system power (Wiener) and regulators are switched with the correct procedure?

  6. ...Next steps (Speed) • DECREASE COMMANDS SENT • Actually the PVSS send too many commands for a single operation. SDO(*) for STOP the reading routine that send PDO(**) with values SDO for check if the reading routine is stopped SDO for the command SDO for START the reading routine SDO for check if the reading routine is started • Change in ELMB and PVSS code (example) SDO for STOP the reading routine Immediately the ELMB stops to read and stops to send PDO, but sends a last PDO with a code that means that the routine is stopped, the PVSS see it.. SDO for the command Immediately after the command, the ELMB start again to read and send PDO and the PVSS can recognize it (*) SDO = Service Data Object, type of can message with acknowledge (**) PDO = Process Data Object, type of can message without acknowledge (faster)

  7. ...Next steps (Speed) 2. OPTIMIZATION OF THE SPEED: • The current Delays are huge and not really needed. There are 3 steps: • Decrease number of commands from PVSS (previous slide) • Change the ELMB and FPGA software for have faster commands (parallelization of the operations on channels where possible, optimizing delay in the FPGA) • Find in PVSS the best delay for each commands (best means the shortest but safe)

  8. ...Next steps (Calibration) • INCREASE THE BIT OF THE ADC • Calibration totally via software, no physical operation on the board) Controller Board #1 10 bit ADC Voltage Range (OK) Controller Board #2 10 bit ADC Voltage Range (OK, but with different calibration respect Controller Board 1) Vmax (~ 2.9V) Controller Board #4 more than 10 bit ADC Voltage Range (OK) Vmin (~ 1.6V) Controller Board #3 10 bit ADC Voltage Range (Wrong position, physical operation needed) Volt

  9. ...Next steps (New functionalities) • ELMB FUNCTIONALITIES IN CASE OF FPGA FAILURE • Watchdog between ELMB and FPGA • The ELMB can RESET the FPGA • The ELMB can read (using its ADC) the values (multiplexer control needed)

  10. Conclusion • Many problem solved, but a lot of work to do. • Francesco and Kerstin (for the PVSS-ELMB part) will start on January (the setup in pixel lab is ready) • Francesco and Fabrizio should meet soon (at CERN or at Milano) for the “stability part” between ELMB and FPGA. To define a date.

  11. Pixel PP2 Communication System DCS Digital Lines on BUS PP2 CANopen SPI* FPGA Regulator CANBUS ELMB Board x 12

More Related