1 / 1

[SERDES Interface Block diagram]

TARGET. Serializer DS92LV1023EMQ. High-Speed Differential Buffer DS15BA101SDE. CAT5e, STP Cable. CLOCK Buffer LMK00105SQE. 50MHz. Deserializer DS92LV1224TMSA. LVDS Cable Extender DS15EA101SQE. RX_DATA 3 bit. CAT5e, STP Cable. [SERDES Interface Block diagram]. TX_DATA 5~6 bit.

carina
Download Presentation

[SERDES Interface Block diagram]

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. TARGET Serializer DS92LV1023EMQ High-Speed Differential Buffer DS15BA101SDE CAT5e, STP Cable CLOCK Buffer LMK00105SQE 50MHz Deserializer DS92LV1224TMSA LVDS Cable Extender DS15EA101SQE RX_DATA 3 bit CAT5e, STP Cable [SERDES Interface Block diagram] TX_DATA 5~6 bit Input Clock 50MHz • Distance from Target : 40~50m, transmission speed is expected to 500Mbps. • Interface cable : connected to CAT5e,STP cable. • Schematic is referred to the Application Note AN-1909. (DS15BA101 and DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES) • And referred to DriveCable02EVK User Manual. • Serializer : DS92LV1023EMQ (TI) • Deserializer : DS92LV1224TMSA (TI) • High-speed Differential Buffer : DS15BA101SDE (TI) • Adaptive Cable Equalizer : DS15EA101SQ(TI) • Clock Buffer : LMK00105SQE (TI)

More Related