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ECE/CS 352 Digital Systems Fundamentals

ECE/CS 352 Digital Systems Fundamentals. Spring 2001 Chapter 2 Part 7. Tom Kaminski & Charles R. Kime. NAND and NOR Implementation. NAND Gates. NAND Gates (Cont.). NAND Implementation. NAND Implementation (Cont.). Degenerate AND Term. NAND-NAND Example. NAND-NAND Example. NOR Gates.

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ECE/CS 352 Digital Systems Fundamentals

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  1. ECE/CS 352 Digital Systems Fundamentals Spring 2001 Chapter 2 Part 7 Tom Kaminski& Charles R. Kime ECE/CS 352 Digital System Fundamentals

  2. NAND and NOR Implementation ECE/CS 352 Digital System Fundamentals

  3. NAND Gates ECE/CS 352 Digital System Fundamentals

  4. NAND Gates (Cont.) ECE/CS 352 Digital System Fundamentals

  5. NAND Implementation ECE/CS 352 Digital System Fundamentals

  6. NAND Implementation (Cont.) ECE/CS 352 Digital System Fundamentals

  7. Degenerate AND Term ECE/CS 352 Digital System Fundamentals

  8. NAND-NAND Example ECE/CS 352 Digital System Fundamentals

  9. NAND-NAND Example ECE/CS 352 Digital System Fundamentals

  10. NOR Gates ECE/CS 352 Digital System Fundamentals

  11. NOR Implementation ECE/CS 352 Digital System Fundamentals

  12. Useful Transformations ECE/CS 352 Digital System Fundamentals

  13. Graphical Transformations ECE/CS 352 Digital System Fundamentals

  14. General Two-level Implementations ECE/CS 352 Digital System Fundamentals

  15. General Implementations (Cont.) ECE/CS 352 Digital System Fundamentals

  16. Implementation Example ECE/CS 352 Digital System Fundamentals

  17. Implement F in AND-NOR form Implement the network: ECE/CS 352 Digital System Fundamentals

  18. Multi-level NAND Implementations • Add inverters in two-level implementation into the cost picture • Attempt to “combine” inverters to reduce the term count • Attempt to reduce literal + term count by factoring expression into POSOP or SOPOS ECE/CS 352 Digital System Fundamentals

  19. Multi-level NAND Example 1 • F = A B’ + A C’ + B A’ + B C’ = A A’ + A B’ + A C’ + B A’ + B B’ + B C’ = A (A’ + B’ + C’) + B (A’ + B’ + C’) 15 inputs and 8 gates* 7 inputs and 4 gates A B F C * Counting inverters (NOTS) as 1 input and 1 gate ECE/CS 352 Digital System Fundamentals

  20. Multilevel NAND Example 2 • F = AB + AD’ + BC + CD’12 inputs & 5 gates = A(B + D’) + C(B + D’)8 inputs & 5 gates A B F D C ECE/CS 352 Digital System Fundamentals

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