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Verifiable Embedded Real-Time Application Framework

This paper presents VERTAF, a framework for developing verifiable embedded real-time applications using object-oriented techniques and formal verification. It integrates components such as implanter, modeler, scheduler, verifier, and generator. A case study of an autonomous intelligent cruise controller (AICC) is also presented. With VERTAF, design effort is reduced by 95% compared to traditional methods.

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Verifiable Embedded Real-Time Application Framework

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  1. Verifiable Embedded Real-Time Application Framework Pao-Ann Hsiung, Feng-Shi Su, Shu-Yu Cheng, and Yu-Ming Chang National Chung Cheng UniversityChiayi-621, Taiwan, R.O.C. Real-Time Technology and Applications Symposium (RTAS’01), Work-In-Progress Session,May 30, 2001, Taipei, Taiwan, R.O.C.

  2. Outline • Introduction • VERTAF Components • Application Development • AICC Cruise Controller Example • Conclusion

  3. Introduction Object-Oriented Techniques SoftwareComponent FormalVerification Portable Reusable Well-defined Interface Design Patterns Design Reuse Class Libraries Verfiable Correct Designs Model Checking Verifiable Embedded Real-Time ApplicationFramework (VERTAF) Integration of 3 Technologies:

  4. VERTAF Components

  5. VERTAF Components (Contd.) • Implanter: Autonomous Timed Objects (ATO) • Modeler: Autonomous Timed Processes (ATP) • Scheduler: Policy Selector, Schedule Generator • Verifier: Model Checker (TA+TCTL) • Generator: Code Generator

  6. Autonomous Timed Object

  7. Autonomous Timed Process

  8. Model Checker Symbolic_Mcheck(S, ) Set of TA S; TCTL formula ; { Let Reach = Unvisited = {Rinit}; While (Unvisited NULL) { R = Dequeue(Unvisited); For all out-going transition e of R { R = Successor_Region(R, e); IfR is consistent & RReach { Reach = Reach {R}; Queue(R, Unvisited); } } } Label_Region(Reach, ); ReturnL(Rinit); }

  9. Code Generator • Formal Model: Time Free-Choice Petri Nets • Memory Bound: Quasi-Static Scheduling • Timing Constraints: Real-Time Schedulability Analysis • Optimal Code: Minimum Number of Tasks

  10. Application Development Specification Integration Generation

  11. Autonomous Intelligent Cruise Controller (AICC) Example Swedish Road Transport Informatics ProgrammeInstalled in a SAAB automobile

  12. # Task Description Object Period (ms) Execution Time (ms) Deadline 1 Traffic Light Info SRC 200 10 400 2 Speed Limit Info SRC 200 10 400 3 Proc. Vehicle Estimator ICCReg 100 8 100 4 Speed Sensor ICCReg 100 5 100 5 Distance Control ICCReg 100 15 100 6 Green Wave Control ICCReg 100 15 100 7 Speed Limit Control ICCReg 100 15 100 8 Coord. & Final Control FinalControl 50 20 50 9 Cruise Switches Supervisor 100 15 100 10 ICC Main Control Supervisor 100 20 100 11 Cruise Info Supervisor 100 20 100 12 Speed Actuator EST 50 5 50 AICC Example: Process Table SRC: Short Range Communication, ICCReg: ICC Regulator, EST: Electronic Servo Throttle

  13. AICC Example: Call-Graph SRC: Short Range Communication, ICCReg: ICC Regulator, EST: Electronic Servo Throttle

  14. Framework Evaluation Metric: Relative Design Effort NATO is the number of ATO, NAFO is the number of VERTAF objects, TWF is the design time with the framework, and TWOF is the design time without the framework. NATO = 5, NAFO = 21, TWF = 5 days, TWOF = 20 days AICC Example (Contd.) With VERTAF: you need only 4.8% effort

  15. Conclusions • Lesser Coding, Shorter Design Time • Verifiably Correct Software Designs • Automatic Code Generation • Current Work: RT-UML  Petri Nets or Timed Automata  Java or C code • Future Work: Larger Domain of Applications, Memory/Time Tradeoff

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