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FPGA Run-time Reconfigurable Placement

FPGA Run-time Reconfigurable Placement. Presentation by Brian Leonard Clemson University 2003 SURE REU Program Advisor: Ron Sass. Outline. Background Placement Package Online Placement Offline Placement Conclusion. Outline. Background Placement Package Online Placement

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FPGA Run-time Reconfigurable Placement

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  1. FPGA Run-time Reconfigurable Placement Presentation by Brian Leonard Clemson University 2003 SURE REU Program Advisor: Ron Sass

  2. Outline • Background • Placement Package • Online Placement • Offline Placement • Conclusion

  3. Outline • Background • Placement Package • Online Placement • Offline Placement • Conclusion

  4. Background - FPGAs • Field Programmable Gate Array • Reconfigurable • RTR Architectures

  5. Background - Definitions • Modules • Configuration • Affinity

  6. Background – Example

  7. Background – Example Cover This Up now

  8. Background – Example

  9. Outline • Background • Placement Package • Online Placement • Offline Placement • Conclusion

  10. List of modules currently on chip List of empty rectangles Placement Package - Representation

  11. Placement Package - Representation • List of modules currently on chip • List of empty rectangles

  12. Placement Package - Representation • List of modules currently on chip • List of empty rectangles

  13. Placement Package - Representation

  14. Placement Package - Algorithms • Class PlacementAlgorithm • Algorithms • First Fit • Best Fit • Worst Fit • Location • Aspect Ratio

  15. Outline • Background • Placement Package • Online Placement • Offline Placement • Conclusion

  16. Online Placement - Problem • Java RTR-JVM • Multiple Classes and Methods • Online Placement • Speed • No affinity considerations

  17. Online Placement - Solution • Test Placement Algorithms • Chip Utilization • Fragmentation • Program Speed • Consensus

  18. Outline • Background • Placement Package • Online Placement • Offline Placement • Conclusion

  19. Offline Placement - Problem • Large, Fully-Implemented Program • More Computation Time • Considerations • Affinity • Reconfiguration time

  20. Offline Placement - Lattice

  21. Offline Placement - Lattice Chip Size = 5 A = 4 B = 1 C = 2 D = 1

  22. Offline Placement - Solution • Place Frontier Configurations • Transition Table • How to Place • For Reconfiguration • For Affinity (run-time speed) • Compromise

  23. Outline • Background • Placement Package • Online Placement • Offline Placement • Conclusion

  24. Conclusion • Summary • Placement Package • Online Placement • Offline Placement • Future Work • Conclusion

  25. Thank you.

  26. Backup Materials • None yet

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