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Lab 8

Lab 8. Prob 5.1. Combinational logic, sequential logic or Both? Multiplexor Comparator Incrementer/ decrementer Barrel shifter Multiplier with shifter and adders Registers Memory ALU Carry look-ahead adder Latch General finite state machine. Prob 5.2. Single stuck-at-0-fault

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Lab 8

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  1. Lab 8

  2. Prob 5.1 • Combinational logic, sequential logic or Both? • Multiplexor • Comparator • Incrementer/ decrementer • Barrel shifter • Multiplier with shifter and adders • Registers • Memory • ALU • Carry look-ahead adder • Latch • General finite state machine

  3. Prob 5.2 • Single stuck-at-0-fault • RegWrite • ALUop1 • ALUop0 • Branch • MemRead • MemWrite • Instructions • R-type • lw • sw • beq

  4. ALUop table

  5. Control lines setting table

  6. Prob 5.8 • Given previous slide • Wish to add “jr” To do: • Datapaths and control signal needed to support “jr”. • Addition to control signal setting table.

  7. Prob 5.9 • Similar to Prob 5.8 • Wish to add “sll” • Shamt 10:6 • Funct 000000

  8. Prob 5.10 • Similar to Prob 5.8 • Wish to add “lui” • lui Rt, immed • 00111 00000 <Rt 20:16> <immed 15:0>4

  9. Prob 5.13 • Is it possible to substitute MemtoReg signal with ALUSrc or MemRead? • Can one of the two signals (ALUSrc and MemRead) substitute for the other?

  10. Prob 5.28 • Critical Path: The longest possible path in the machine. • LW instruction • instruction memory • register file read • ALU • data memory • register file write

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