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Session 5 Government Funded Standards

Session 5 Government Funded Standards.

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Session 5 Government Funded Standards

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  1. Session 5Government Funded Standards This work is sponsored by the High Performance Computing Modernization Office under Air Force Contract F19628-00-C-0002. Opinions, interpretations, conclusions, and recommendations are those of the author and are not necessarily endorsed by the Department of Defense. Dr. Edward Baranoski MIT Lincoln Laboratory

  2. Outline • DoD Need • Standards Goals • Introduction • Key Efforts • Summary

  3. Why Is DoD Concerned with Embedded Software? Source: “HPEC Market Study” March 2001 Estimated DoD expenditures for embedded signal and image processing hardware and software ($B) • COTS acquisition practices have shifted the burden from “point design” hardware to “point design” software (i.e. COTS HW requires COTS SW) • Software costs for embedded systems could be reduced by one-third with improved programming models, methodologies, and standards

  4. Evolution of Software Support Towards“Write Once, Run Anywhere/Anysize” Application Application Middleware Middleware Embedded SW Standards Vendor Software Vendor Software • Many acquisition programs are developing stove-piped middleware “standards” 2000 2005 • Open software standards can provide portability, performance, and productivity benefits Application Application Application Middleware Middleware Middleware Middleware • Support “Write Once, Run Anywhere/Anysize” DoD software development COTS development Application Application • Application software has traditionally been tied to the hardware Vendor Software Vendor SW 1990

  5. DoD Standards Goal DARPA Gov’t Funded Initiatives Applied Research Development Demonstration Programs Enhanced Tactical Radar Correlator (ETRAC) Common Imagery Processor (CIP) Embedded multi-processor Shared memory server APG-73 Goal: Transition advanced software technology and practices into major defense acquisition programs

  6. Measuring Success Demonstrate Portability (3x) Productivity (3x) Object Oriented Open Standards Gov’t Funded Initiatives Interoperable & Scalable Prototype Develop Performance (1.5x) Program Goals • Develop and integrate software technologies for embedded parallel systems to address portability, productivity, and performance • Engage acquisition community to promote technology insertion • Deliver quantifiable benefits Portability:reduction inlines-of-code to change port/scale to new system Productivity:reduction in overall lines-of-code Performance:computation and communication benchmarks

  7. Outline • VSIPL • VSIPL++ • DRI • SCA • Introduction • Key Efforts • Summary

  8. Standards in Systems System Controller Node Controller Parallel Embedded Processor Data Communication:MPI, MPI/RT, DRI Control Communication:CORBA, HP-CORBA SCA P0 P1 P2 P3 Government funded standards must integrate with the entire system Consoles Other Computers Computation: VSIPL Definitions VSIPL = Vector, Signal, and Image Processing Library MPI = Message-passing interface MPI/RT = MPI real-time DRI = Data Re-org Interface CORBA = Common Object Request Broker Architecture HP-CORBA = High Performance CORBA

  9. VSIPL Development Status of the Vector, Signal, and Image Processing Library (VSIPL) Mark Richards / Georgia Institute of Technology Dan Campbell / Georgia Tech Research Institute Randall Judd / U.S. Navy SPAWAR Systems Center James Lebak / MIT Lincoln Laboratory Rick Pancoast / Lockheed Martin Will describe API status, vendor adoption and Forum plans Some other VSIPL work at HPEC: • VSIPL, from API to Product, Sacco/SKY • National Weather Radar Testbed, Walsh/SKY • SIP-7 Experience, Linderman & Bergmann / AFRL • HPEC-SI Demonstration, Sroka / MITRE

  10. VSIPL++ VSIPL++: Intuitive Programming Using C++ Templates Mark Mitchell Jeffrey D. Oldham CodeSourcery LLC Implementors of prototype VSIPL++ Will describe API and its benefits: • Direct support for parallel computation • Simpler syntax and improved type-checking • Reduced validation verification (V&V) costs • Support for specialized data storage formats • Potential for higher performance

  11. HPEC-SI: VSIPL++ and Parallel VSIPL Time Phase 3 Applied Research: Self-optimization Phase 2 Development: Fault tolerance Applied Research: Fault tolerance prototype Phase 1 Demonstration: Unified Comp/Comm Lib Applied Research: Unified Comp/Comm Lib Development: Unified Comp/Comm Lib Parallel VSIPL++ prototype Development: Object-Oriented Standards Demonstration: Object-Oriented Standards VSIPL++ Functionality Parallel VSIPL++ Demonstration: Existing Standards • Unified embedded computation/ communication standard • Demonstrate scalability VSIPL++ VSIPL MPI • High-level code abstraction • Reduce code size 3x • Demonstrate insertions into fielded systems (e.g., CIP) • Demonstrate 3x portability

  12. Technical Scope Development VSIPL++ Applied Research Parallel VSIPL++ -MAPPING (task/pipeline parallel) -Reconfiguration (for fault tolerance) -Threads -Reliability/Availability -Data Permutation (DRI functionality) -Tools (profiles, timers, ...) -Quality of Service -MAPPING (data parallelism) -Early binding (computations) -Compatibility (backward/forward) -Local Knowledge (accessing local data) -Extensibility (adding new functions) -Remote Procedure Calls (CORBA) -C++ Compiler Support -Test Suite -Adoption Incentives (vendor, integrator)

  13. DRI Data Reorganization Interface (DRI) Kenneth Cain, Jr. / Mercury Computer Systems Anthony Skjellum / MPI Software Technology Technology Focus • Higher level abstraction for collective communication (i.e. “corner turn”) Will describe API status, vendor adoption and Forum plans

  14. SCA Software Communications Architecture (SCA) Compliant Software Defined Radios S. Murat Bicer / Mercury Computer Systems Jeffrey Smith / Mercury Computer Systems Technical goal: • Open architecture radios across multiple domains Will describe: • Advantages and difficulties of implementing a SCA-compliant software defined radio • An implementation to define a Minimum SCA OMG Specification

  15. Summary • Government funded standards play a key role in transitioning DoD developed technology into DoD systems • Four efforts are critical for the future success of DoD embedded computing systems • VSIPL • VSIPL++ and Parallel VSIPL • DRI • SCA

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