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Monolithic pixel detector Update

Monolithic pixel detector Update. One chip combining both sensor and read-out source of ionization e- : epitaxial layer of chip e- collected by a n-well elegant, thin solution, or detector of the far future? Progress on four known problems. Problem # 1.

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Monolithic pixel detector Update

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  1. Monolithic pixel detectorUpdate • One chip combining both sensor and read-out • source of ionization e- : epitaxial layer of chip • e- collected by a n-well • elegant, thin solution, or detector of the far future? • Progress on four known problems

  2. Problem # 1 • fillFactory.com manufactures optical pixel-sensors with collection from epitaxial layer (US patent) • n-well to collect ionisation e- restricts transistors to n-MOS • makes it difficult to have on pixel electronics, amplifiers etc.

  3. Possible Solution to Problem #1 • ISU engineers, add n-wells to house p-MOS transistors • p+ layer keeps potential minimum for ionization electrons to diffuse to collection n-well • foundry issues? simulation? n-MOS p-MOS n+

  4. Problem #2 Quality of Silicon, Thickness epi-layer • LEPSI group used Austrian Mikro Systeme • 17 micron epi-layer • 1000 e- • STAR reproduced LEPSI work, used MOSES • 8 micron epi-layer • Still an unresolved issue

  5. Problem #3: Existing Monolithic Slow • Current monolithic pixel detector (LEPSI) had one ADC per chip • very slow • Two designs being worked on by ISU engineers • copy circuit from active imaging devices • on each pixel, free-running pre-amplifier • sample-hold preamplifier output upon a Lvl1 signal • on each column, 3-4 bit flash ADC. (~1000 ADCs) • access sample/hold from each pixel and digitize • 50~100 pixels per column • timing being developed • copy NA60 readout electronics per pixel • on each pixel, amplifier, discriminator, buffer

  6. Problem #4 Mixed Analog/Digital • If we use discriminator and buffer on each pixel, possible digital noise corruption on analog signal • could use RHIC clock signal • no digital activity during first 20 ns after collision • If we use sample/hold on each pixel • no digital circuitry per pixel • digital circuitry at base of column

  7. Iowa State R&D • R&D project Electrical Engineering Profs/students at ISU • working on epitaxial layer, doping and foundry issues • laying out pixel electronics • on-pixel amplifier/sample-hold. Column ADC • on-pixel discriminator/pipeline from NA60 • Goal is to have first design finished by Christmas • simulate • iterate • submit prototype in Spring 2002

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