Models for the Performance of Clustered Photolithography Tools with Applications

1. Models for the Performance of Clustered Photolithography Tools with Applications James R. Morrison Associate Professor Industrial & Systems Engineering

2. Presentation Overview • Motivation • System description (CPT) • Models for CPTs • Some recent flow line theory • Application opportunities • Where next? • Concluding remarks Clustered Photolithography Tool Industry interaction Next development steps Linear Affine (Ax+B) Flow line Detailed Exact decomposition Exit recursions Markovian models Capacity increase Toolset agility Fab simulation components

3. Acknowledgements • Much of the work discussed here was developed with • Dr. Kyungsu Park • Dr. Woo-sung Kim • MS student John Park • BS student HyunsukBaek • Several of the slides were prepared by • Dr. Kyungsu Park • Dr. Woo-sung Kim • MS student John Park • BS student HyunsukBaek

4. Presentation Overview • Motivation • System description (CPT) • Models for CPTs • Some recent flow line theory • Application opportunities • Where next? • Concluding remarks

5. Motivation (1) • Semiconductor manufacturing • Global revenue in 2013: NT$ 9,540 billion (US$ 318 billion) • Construction costs • 300 mm wafer fab: NT$150 billion (US$ 5 billion [2]) • 450 mm wafer fab: NT$300-450 billion (US$10-15 billion) • Significant value for improvements • 1996-1999: Fab production control method earned Samsung NT$ 15 billion (US$ 1 billion [3]) additional revenue • 2005: IBM’s 30 independent supply chains merged into a single global system and saved NT$ 180 billion (US$ 6 billion [4]) • … [1]

6. Motivation (2) • Clustered photolithography tools (CPT) • Purchase cost of NT$ 0.6-3 billion (US$ 20-100 M [5]) • The most expensive tool in a fabricator • Typically the bottleneck of the fabricator • Key yield and cycle time contributor [5]

7. Motivation (3) CPT Vendor: “Our CPTs can run at 120 wph”  Fab analyst: “Your CPTs can run at 80 wph”  Who is right? Exhaustive and exhausting tool log analysis… CPT Vendor: “Our CPTs are awesome”  Fab analyst: “We are disappointed” 

8. Motivation (4) • Want: Models for CPTs • Accurate: Predict throughput with less than 1% error • Expressive: Incorporate fundamental behaviors • Computationally tractable: Very quick to calculate results • For the purpose of: • Understanding toolset performance • Enabling capacity optimization • Toolset scheduling or optimization • Improving the quality of fab simulation models Discuss in the application section

9. Presentation Overview • Motivation • System description (CPT) • Models for CPTs • Some recent flow line theory • Application opportunities • Where next? • Concluding remarks

10. System Description: CPT (1) [6] Scanner Clustered Photolithography Tool • Multi-cluster tool, robot in each cluster, IF buffers, STK buffer • Scanner is often the CPT bottleneck • Largely deterministic process times • Process time can vary by product • Setups between lots (reticle changes, pre-scan setup, …) • Wafer handling robot decision policy & deadlock prevention

11. System Description: CPT (2) Conceptual diagram of a CPT (slightly simplified) Pre-scan processes Buffer P2 Scanner P6 P1 P4 Wafers Enter P3 P5 P2 P1 P4 P2 Wafer handling robots P11 P8 P9 Wafers Exit P10 P7 P11 P8 P9 P11 P8 Post-scan processes Conceptual diagram of a CPT (robots “removed”) Pre-scan processes buffer Post-scan processes buffer Wafers Enter Wafers Exit … Scanner P2 P11 buffer P1 … buffer … P2 P11 P6 P1 buffer P2 P11 buffer

12. System Description: Performance Metrics • Notation • al: arrival time of lot l to the tool queue • Sl : start time of lot l on a tool • Cl : completion time of lot lon a tool • Wl : wafers in lot l • Performance measures • Cycle time of lot l: TlCT:=Cl-al • Process time of lot l: TlPT:= Cl-Sl • Throughput time of lot l: TlTT:= min{ TlPT, Cl – Cl-1 } Computation time T1TT T2TT T3TT Lot 1 Lot 2 Lot 3 Time

13. Presentation Overview • Motivation • System description (CPT) • Models for CPTs • Some recent flow line theory • Application opportunities • Where next? • Concluding remarks

14. Models for CPTs • Models with various levels of detail Detailed Model “Everything” Linear Model A(k1) A(k1), B Affine Models A(k1), B(k1) Collect Tool Log Data A(k1), B(k1, k2) Parametric flow lines Flow Line Models Train a set of parameters Empirical flow lines With complete tool log data Exit Recursion Models Simulate models With wafer in/out log data With lot in/out log data

15. Linear Model • Referred to as the Ax equipment model or linear model • Time between wafer completions: Al • Process time estimation: TlPT= Ak1 ∙ w(l) ( w(l): the number of wafers of lot l ) Ax Model for lot cycle time in a one machine tool Wafers enter Wafers exit m Al • Pros: • Simple to understand • Fast computation • Cons: • Exactly matched to single wafer tool, not to CPT Complete Model: l= max{ al, l-1 } l = l l = l + Ak1 ∙ w(l) l= l

16. Affine Models • Referred to as the Ax+Bmodel • First wafer delay: Bl • Time between wafer completions: Al • Process time estimation: TlPT= Ak1∙ (w(l) – 1) + Bl( w(l) : the number of wafers of lot l ) B can be generalized to B(k1), B(k1, k2) • Pros: • Simple to understand • Fast computation • Cons: • Only one module per process, so not matched to CPT • New lots enter only when the tool is empty Complete model: l= max{ al, l-1 } l = l l = l + B + Ak1 ∙ (w(l) - 1) l= l

17. Flow Line Models – Elementary Evolution Equations • Notation • aw: Arrival time of wafer wto the tool, awaw-1 • Xi(w): Entry time of wafer w into process i of the tool • : Deterministic process time for process i • Elementary Evolution Equations (EEEs) • X1(w) = max{aw , X2(w-1) } • Xi+1(w) = max{Xi(w) + , Xi+2(w-1) } • XM(w) = max{XM-1(w) + , XM(w-1) + } (M is the last process) Process i W W-1

18. Flow Line Models • Elementary Evolution Equations (EEEs) can be generalized to allow: • Different classes of wafer to be produced • Multiple modules per process • Consider robotic workload in process times of modules • Consider setups – reticle setup, pre-scan setup • Parameter extraction • Parametric flow line model – Known process times, robot times, and setup times • Empirical flow line model – Parameters extracted from wafer advancement data Wafers enter Wafers exit

19. Exit Recursion Model (1) • Extend affine models to allow for flow line style behaviors • Idea: • Bottleneck analysis approach • Obtain parameters from limited population • Example • For only wafer or lot in/out log data, • Restrict population to account for desired parameter meaning • Least square method (LSM) to obtain parameters NoContention at bottleneck Contention at bottleneck

20. Exit Recursion Model (2) where

21. Exit Recursion Model (3)

22. Computational Comparison

23. Accuracy Assessment • Errors relative to detailed model • Error of 20%+ • Error 5-20% • Error 0-5%

24. Presentation Overview • Motivation • System description (CPT) • Models for CPTs • Some recent flow line theory • Application opportunities • Where next? • Concluding remarks

25. Some Recent Flow Line Theory (1): Exit Recursions • Exit recursions describe wafer flow using a single equation • Avi-Itzhak, Friedman in 1965 ([7, 8]) • Random customer arrivals and deterministic service times • Theorem: Exact recursion for customer completion (exit) times • cM(k) is the completion time of wafer k from process M • aK is the arrival time of wafer k to the system • tB is the bottleneck process time … … P1 P2 P3 PM Wafer Lots Arrive Wafer Lots Exit … t1 t2 t3 tM

26. Some Recent Flow Line Theory (2): Exit Recursions • Multiple servers per process in 2010 ([9]) • Theorem: Recursive bound for customer completion (exit) times • t(i)max is the bottleneck process time for those processes with i servers • Conjecture that this is an exact result P3 P1 PM R3=3 … … P2 R1=2 RM=2 R2=1 Customers Arrive Customers Exit … t2 t1 tM t3

27. Some Recent Flow Line Theory (3): Exact Decompositions • Theorem:Exact channel decomposition in 2010, 2011 ([10, 11]) • Theorem: Can be modeled as a Markov chain in 2014 ([12]) • Theorem:Systems with setups (as in semiconductor manufacturing) can be modeled and optimized in 2014 ([13]) Channel 1 Channel 2 Channel 3 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 t10 t1 t4 t6 t2 t3 t5 t7 t8 t9 t11

28. Presentation Overview • Motivation • System description (CPT) • Models for CPTs • Some recent flow line theory • Application opportunities • Where next? • Concluding remarks Capacity increase Toolset agility Fab modeling components

29. Application Opportunities: Capacity Increase • Fundamental process/robot bottleneck analysis & mitigation • More complicated analysis • Buffer size implications • Manufacturing environment & mitigation • Penultimate dominating process Fab initiative: Aggressive pursuit of CPT wphresults in 20% capacity improvement Pre-scan processes buffer Post-scan processes buffer Wafers Enter Wafers Exit … Scanner P2 P11 buffer P1 … buffer … P2 P11 P6 P1 buffer P2 P11 buffer

30. Application Opportunities: Toolset Agility • Wafers are commonly admitted to a CPT as soon as possible • Deployment opportunity of the lot is reduced • High priority hot lots experience additional queueing • Lot/wafer residency time and buffer level greater than required • Question: When should wafers be admitted to the CPT? • Maintain throughput capacity • Minimize residency time and thereby increase agility

31. Application Opportunities: Toolset Agility (2) Lexicographic Multi-Objective Linear Program (LMOLP) ([14])

32. Application Opportunities: Toolset Agility (3) • Results: Detailed CPT model Trade-off between throughput and wafer residency time JIT

33. Application Opportunities: Fab Simulation/Modeling • Equipment and fabricator simulations are used to • Predict value of changes to fabricator capacity • Predict value of changes to fabricator production control policies • Predict capacity of fabricators • Want expressive, accurate and computationally tractable models to help make decisions on US$ billions • Future manufacturing facilities will cost US$15 billion • High quality models enable improved decisions

34. Application Opportunities: Fab Optimization • Can also be used for model based optimization • Local toolset production control • Global fab production control

35. Presentation Overview • Motivation • System description (CPT) • Models for CPTs • Some recent flow line theory • Application opportunities • Where next? • Concluding remarks

36. Where next? • Industry application • Model based CPT capacity optimization • Toolset agility improvement via judicious CPT wafer release • Improved fab simulation models • Incorporation of improved models into fab scheduling • Model development • Flow line theories • Improved Exit Recursion models • Analytic methods for CPT capacity optimization

37. Presentation Overview • Motivation • System description (CPT) • Models for CPTs • Some recent flow line theory • Application opportunities • Where next? • Concluding remarks

38. Concluding Remarks • How to understand clustered photolithography tools? • Models for CPTs • Linear/Affine • Flow line based • Some recent flow line theory • Application opportunities Can these models be used to help improve real fab performance?

39. Models for the Throughput of Clustered Photolithography Tools with Applications James R. Morrison Email: james.morrison@kaist.edu Homepage: http://xS3D.kaist.edu

40. References • HIS iSuppli April 2011 • ElpidaMemory, Inc., available at http://www.eplida.com, • Leachman, Robert C., Jeenyoung Kang, and Vincent Lin. "SLIM: Short cycle time and low inventory in manufacturing at samsung electronics." Interfaces32.1 (2002): 61-77 • http://www.forbes.com/forbes/2003/0811/076.html • Roger H. French and V. Hoang, “Immersion Lithography: Photomask and Wafer-Level Materials,” Tran. Annual Review of Materials Research, Vol. 39, 93-126 • Hyun Joong Yoon and Doo Yong Lee, “Deadlock-free scheduling of photolithography equipment in semiconductor fabrication,” IEEE Trans. Semi. Mfg., vol. 17, no. 1, pp. 42-54, 2004 • Avi-Itzhak, B. "A sequence of service stations with arbitrary input and regular service times." Management Science 11.5 (1965): 565-571 • Friedman, Henry D. "Reduction methods for tandem queuing systems." Operations Research 13.1 (1965): 121-131 • Park, Kyungsu, and James R. Morrison. "Performance evaluation of deterministic flow lines: Redundant modules and application to semiconductor manufacturing equipment." Automation Science and Engineering (CASE), 2010 IEEE Conference on. IEEE, 2010 • Morrison, James R. "Deterministic flow lines with applications." Automation Science and Engineering, IEEE Transactions on 7.2 (2010): 228-239 • Morrison, James R. "Multiclass flow line models of semiconductor manufacturing equipment for fab-level simulation." Automation Science and Engineering, IEEE Transactions on 8.1 (2011): 81-94 • Kim, Woo-sung, and James R. Morrison, “On the steady state behavior of deterministic flow lines with random arrivals.” Accepted June 14, 2014 for IEEE Transactions on Automation Science and Engineering (IEEE) • Kim, Woo-sungand James R. Morrison, “The throughput rate of serial production lines with regular process times and random setups: Markovian models and applications to semiconductor manufacturing,” Computers & Operations Research (Elsevier), Online at http://dx.doi.org/10.1016/j.cor.2014.03.022, April 4, 2014. • Park, Kyungsuand James R. Morrison, “Controlled wafer release in clustered photolithography tools: Flexible flow line job release scheduling and an LMOLP heuristic,” IEEE Transactions on Automation Science and Engineering (IEEE), Online at http://dx.doi.org/10.1109/TASE.2014.2311997, April 7, 2014. Longest waiting pair: [7] Geismar, H.N.; Sriskandarajah, C.; Ramanan, N., "Increasing throughput for robotic cells with parallel Machines and multiple robots," IEEE Trans. Auto. Sci. and Eng., vol.1, no.1, pp.84,89, Jul 2004