Introduction of Auxiliary Emitter Resistors

2. i ≤ 10 A Introduction of Auxiliary Emitter Resistors • The introduction of REx (≈ 10 % of RGx) leads to • Limitation of equalising currents i≤ 10 A • Damping of oscillations C G RE2 RE1 REn AE V2 Vn V1 E

3. i Introduction of Auxiliary Emitter Resistors • The introduction of REx leads also to a negative feedback: • The equalising current i leads to a voltage drop VREx at the Emitter resistors REx fast IGBT slow IGBT C G AE VRE2 VRE1 E

4. i Introduction of Auxiliary Emitter Resistors The introduction of REx leads also to a negative feedback: The voltage drop VRE1 reduces the gate voltage of the fast IGBT and decreases therewith its switching speed. The voltage drop VRE2 increases the gate voltage of the slow IGBT and makes it faster. During switch off: vice versa. fast IGBT slow IGBT C G VRE1 VRE2 AE E

5. Additional proposals • The introduction of Z-Diodes • prevents over voltages at the gate contacts. • Therefore these clamping diodes must be placed very close to the module connectors

6. Additional proposals • The introduction of Shottky-Diodes parallel to REx • helps to balance the emitter voltage during short circuit case. • Dimensioning ≈ 100V, 1A.

9. Multi-level-inverter application

10. Topology of a multi level inverter (Three step)

11. Cells in series

12. Robicon princip Rectifier Circuit : Simple diode rectifier with various three-phase windings 2Q Drive capability Patent rights: Robicon Semiconductors in use: standard IGBT + Diode arrangement Transformer in use: Different secondary windings, STAR, DELTA, Z, Number of Cells: number of cell in series 100% (as by Robicon)

13. Multi cell system like Robicon

14. Vienna rectifier with H-brigde Rectifier Circuit :Vienna rectifier 2Q Drive only Patent rights: Zener and Prof Kolar ETH Zürich Semiconductors in use: Not standard IGBT + Diode arrangement Transformer in use: All secondary windings are equal Number of Cells: Same number of cell as by Robicon

15. Double booster with Multi level inverter Rectifier Circuit : Three-phase PFC with doable booster 2Q Drive only Patent rights: SEMIKRON International Semiconductors in use: standard IGBT + Diode arrangement Transformer in use: All secondary windings are equal; Number of Cells: 1/2 number of cell as by Robicon

16. New SEMiX - Flexibility Multilevel switch

17. New SEMiX Module with Semikron Patent Halfbridges 2 x Choppers = Multi-Level-Modul

18. Multi-Level-leg with standard SEMiX module - Terminal GB module DC bus capacitor + Terminal

19. Multi Level Inverter • Why multi level inverter • All Semiconductors must have the half blocking voltage • With Multi Level Topologies are high output frequency achievable • Small output filter • 3 potentials available (+/-/centre point) • Minimization of rotor losses caused by current ripple • Through asynchronous clocking higher output frequencies achievable • EMC behavior • Potential difference only 50% of standard inverter • Reduction of audible motor noise • Reduction of ball bearing leakage current

20. EMC consideration during development of inverter

21. EMC Standards - Generic

22. EMC Standards - Immunity Tests

23. EMC Standards - Emission Measurements

24. Motor cable - correct

25. EMI rules I • Never put input and output together • Input on top of the inverter • Output on bottom of the inverter • Don’t use painted housings – bad connection • Connect the isolation of transformers to ground • Heatsink must be connected to the input terminals directly (PE)

26. EMI rules II • Use snubber capacitors to avoid voltage drop in the DC-Bus voltage. Voltage drop will generate a very high dv/dt • Use only freewheeling diodes with a soft recovery behavior • Multi layer technology is avoiding stray inductance

27. Fast switching IGBTs • IGBTs generates a very high dv/dt • Long motor cable • Isolation problems of the motor wire • Over voltage on the motor terminal through reflections • Installation of special motor filter • Capacitors generate leakage current • Sensitive short circuit monitoring • Higher switching losses • Installation of output reactor • Ground connection • Bad ground connection generates higher noise level by frequencies up to 2 MHz

28. EMC - Checklist • Did you connect all heatsinks with ground (PE)? • use a big surface for the connection (HF-current) • star connection • No painted surface - clean • Did you install cores in the flatcables between controller-board and power stage • Did you design a filter board between power stage and controller board? • Did you use snubber capacitors on the +/- terminals? • Did you use shielded cable between motor and inverter? • connect the shield on the heatsink and on the housing of the motor • avoid arcing • check all screws • check the surface of the DC-bus-bars

29. SEMiX and Skyper

30. Sixpack Sixpack Modular IPM Springs for snap-on driver Pins for soldered driver The platform idea

31. The platform family (600 V, 1200 V, 1700 V)

32. All switch topologies available Half bridge Chopper Sixpack

34. New driver concept “SKYPER” • Reduced to basic functions • 30% less components • => less costs • 2 IGBT-Driver versions: SKYPER™ + SKYPER ™ PRO

35. How to handle a IGBT Information

36. How can we protect the gate? Information

37. Gate Emitter Resistor

38. Gate clamping

39. IGBT Gate protection

40. How should we calculate the driver? Proposal

41. Which gate driver is suitable for the module SKM 200 GB 128D ? Design parameters: fsw = 10 kHz Rg = 7  Example for design parameters

42. The suitable gate driver must provide the required • Gate charge (QG) • Average current (IoutAV) • Gate pulse current (Ig.pulse) • at the applied switching frequency (fsw) Demands for the gate driver

43. Gate charge (QG) can be determined from fig. 6 of the SEMITRANS data sheet The typical turn-on and turn-off voltage of the gate driver is VGG+ = +15V VGG- = -8V 15  QG = 1390nC -8 1390 Determination of Gate Charge

44. Calculation of average current: • IoutAV = P / U U = +Ug – (-Ug) • with P = E * fsw = QG * U * fsw •  IoutAV = QG * fsw = 1390nC * 10kHz = 13.9mA Calculation of the average current

45. Examination of the peak gate current with minimum gate resistance • E.g. RG.on = RG.off = 7 • Ig.puls≈ U / RG = 23V / 7 = 2.3A Calculation of the peak gate current

46. Power explication of the Gate Resistor • P tot – Gate resistor • Ptot Gate resistor = I out AV x U • More information: The problem occurs when the user forgets about the peak power rating of the gate resistor. The peak power rating of many "ordinary" SMD resistors is quite small. There are SMD resistors available with higher peak power ratings. For example, if you take an SKD driver apart, you will see that the gate resistors are in a different SMD package to all the other resistors (except one or two other places that also need high peak power). The problem was less obvious with through hole components simply because the resistors were physically bigger. The Philips resistor data book has a good section on peak power ratings.

47. The absolute maximum ratings of the suitable gate driver must be equal or higher than the applied and calculated values • Gate charge QG = 1390nC • Average current IoutAV = 13,9mA • Peak gate current Ig.pulse = 2.3A • Switching frequency fsw = 10kHz • Collector Emitter voltage VCE = 1200V • Number of driver channels: 2 (GB module) • dual driver Choice of the suitable gate driver

48. According to the applied and calculated values, the driver e. g. SKHI 22A is able to drive SKM200GB128D Calculated and applied values: • Ig.pulse = 2.3A@ Rg = 7 • IoutAV = 13.9mA • fsw = 10kHz • VCE = 1200V • QG = 1390nC Comparison with the parameters in the driver data sheet