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EKT 221 – Counters. Synchronous Counter. • To eliminate the "ripple" effects, use a common clock for each flip-flop and a combinational circuit to generate the next state. • For an up-counter, use an incrementer. Synchronous Counter. Synchronous Counter. • Internal Logic
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Synchronous Counter • To eliminate the "ripple" effects, use a common clock for each flip-flop and a combinational circuit to generate the next state. • For an up-counter, use an incrementer
Synchronous Counter • Internal Logic – XOR complements each bit – AND chain causes complement of a bit if all bits toward LSB from it equal 1 • Count Enable – Forces all outputs of AND chain to 0 to “hold” the state • Carry Out – Added as part of incrementer – Connect to Count Enable of additional 4-bit counters to form larger counters
Synchronous Counter Serial Gating
Counter with Parallel Load • Add path for input data • enabled for Load = 1 • Add logic to : • Disable count logic for Load = 1 • Disable feedback from outputs for Load = 1 • Enable count logic for Load = 0 & Count = 1
Counter with Parallel Load • The resulting function table :
Converting parallel load counter into sync. BCD counter • Connect an external AND gate to LOAD • Start with all-zero output (0000) • COUNT input always HIGH (1) • BCD counts from 0000 to 1001 • To ensure LOAD = 1, Q0 and Q3 must be HIGH • LOAD input (D0 D3) = 0000
Synchronous BCD Counter • Y = 1, when present state = 1001 • FF input equations • Obtained from next – state values • Simplify using K – map • 1010 1111 (don’t care) • Y = Q1Q8
Counting Modulo N • A counter that goes through a repeated sequence of N states • Maximum decimal number to be counted : • If Mod 16, then the max decimal number is 15 • If Mod N = 2n then the max decimal counted is N-1 • To determine the required number of flip-flops: • n flip-flop 2n output = Mod N
Counting Modulo 7 • Use a synchronous 4 – bit binary counter with a synchronous load and clear • LOAD – detect count “6” and load “0” • Gives count of ( 0,1,2,3,4,5,6,0,1….) • Using don’t care for states above 0110, detect number “6” when LOAD = Q2.Q1
Counting Modulo 6 : special requirement • Requirement : synchronously preset “9” on RESET and LOAD “9” on terminal count “14” • Use a synchronous, 4 – bit counter with a synchronous LOAD • Use LOAD signal to : • preset count to “9” • detect count “14” • Give count of (9,10,11,12,13,14,9,10,…)
Arbitrary Count Sequence • Design a counter with six states as in table below
Arbitrary Count Sequence • 2 states are not included : 011 and 111 • Simplified equations :
Arbitrary Count Sequence • Logic diagram of the counter