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Levan Babukhadia

Collaboration Meeting , July 26, 2001, Fermilab. CTTT Status. Levan Babukhadia. SUNY at Stony Brook. http://www-d0.fnal.gov/~blevan/upgrade.html. CTTT

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Levan Babukhadia

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  1. Collaboration Meeting, July 26, 2001, Fermilab CTTT Status Levan Babukhadia SUNY at Stony Brook http://www-d0.fnal.gov/~blevan/upgrade.html

  2. CTTT • Sums up various tracks/clusters from octant (CTOC) boards, etc., to form ALL L1 CFT/CPSax neoterms (up to 96) and transmits them to the TM. Also sends all of its L1 inputs to the L3 upon L1 Accept. • Hardware • 1 DWDB with 2 XCV600 FPGAs (to make it uniform throughout the system, otherwise just one XCV600 should suffice) • No dedicated production board here yet... concentrating on CTOC boards, but any of the DFE boards can be substituted for CTTT (and FPTT) ...

  3. Firmware • Receives and synchronizes data on arbitrarynumber of input links by instantiating L1FE firmware (DØ Note 3881) thereby implement-ting L1 pipeline for inputs and the L3 Sender • Waits to receive and correct all data and then maps into (iso)tracks, clusters, etc. • Forms TMO, THT1, and THT2 (old names) Occupancy Level trigger terms each correspon-ding to thresholds with easily adjustable and tunable values (defaults are 5, 10, and 15%) • Right now, the CTTT Trigger Term formation VHDL is implemented in the surrogate CTOC board due to the limitations of the hardware setup of the Occupancy/HIT trigger • Has been integrated with the general purpose TestBench (DØ Note 3871) and tested at behavioral and timing levels • A month or so ago, CTTT firmware was chained up with CTOC firmware in a simulation and both pieces of firmware worked fine

  4. Outlook • Expect certain track Trigger Terms (such as TTK, TTA, TEL, TPQ, TNQ) in about a month • Isolated track terms (such as TIS, TDS, TIL, TIQ) and certain other terms (such as TDL,…) to come next • In any case, will definitely keep up-to-speed with everything else … • Have updated neoterm list taking into account single preshower threshold, freeing up 10 trigger bits. This will be implemented soon in the firmware and the simulator

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