1 / 15

Power Point Presentation

Power Point Presentation. Donald Bearden CS 147 September 13, 2001. Topics Covered:. Sec 1.3.5: Adders and Subtractors Sec 1.3.6: Memory Sec 1.4.1: BCD to 7-segment Decoder Sec 1.4.2: Data Sorters. 1.3.5: Adders and Subtractors.

dsewell
Download Presentation

Power Point Presentation

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Power Point Presentation Donald Bearden CS 147 September 13, 2001

  2. Topics Covered: Sec 1.3.5: Adders and Subtractors Sec 1.3.6: Memory Sec 1.4.1: BCD to 7-segment Decoder Sec 1.4.2: Data Sorters

  3. 1.3.5: Adders and Subtractors • The circuits used to perform arithmetic operations are constructed using combinatorial logic. ADDERS are the most commonly used. • HALF ADDERS are the most basic of the adders. It inputs two 1-bit values, X and Y and outputs their 2-bit sum as bits C(carry) and S(sum).

  4. A half adder: • Truth table: • X Y | C S • ------------- • 0 0 | 0 0 • 0 1 | 0 1 • 1 0 | 0 1 • 1 1 | 1 0 Half adder Y X S C

  5. 1.3.5: Adders and Subtractors • FULL ADDER was developed to add numbers that are more than one bit wide. It has three inputs: the two data inputs and a carry input(Cin). The output is the same as the half adder.

  6. FULL ADDER: • Truth table: • X Y Cin | C S • ------------------- • 0 0 0 | 0 0 • 0 0 1 | 0 1 • 0 1 0 | 0 1 • 0 1 1 | 1 0 • 1 0 0 | 0 1 • 1 0 1 | 1 0 • 1 1 1 | 1 0 • 1 1 1 | 1 1 X Y Full adder Cin C S

  7. 1.3.5: Adders and Subtractors • RIPPLE ADDER: full adders cascaded to produce an n-bit adder by connecting output C of an adder to Cin of th enext adder. The reason it’s called a ripple adder is the carry bits ripple through the adder. • Each full adder has a small PROPAGATION DELAY, which adds up as the carry bits are propagated, or ripple, from right to left. • One solution to the delay problem is the CARRY LOOKAHEAD ADDER. This adder breaks the implementation of the carry into two parts: the GENERATE, g part and the PROPAGATE, p.

  8. 1.3.5: Adders and Subtractors • FULL SUBTRACTORS are logic components that directly subtract two values. It has three inputs: two data inputs and a borrow input. • TWO’s COMPLEMENT can also be used to implement subtraction. Two’s complement of a value is the negative of that value. It is generated by complementing the value and adding 1.

  9. 1.3.6: MEMORY • MEMORY is a group of circuits used to store data. Although not strictly combinatorial in design, it can be used as combinatorial components in digital circuits. • A memory component has some number of memory locations, each of which stores a binary value of some fixed length. • The number of locations and the size of each location vary from memory chip to memory chip, but are fixed within an individual chip. • The size of the chip is denoted as the number of locations times the number of bits in each location. A memory chip of size 512 x 8 has 512 memory. • A memory chip with 2(n) locations requires n ADDRESS inputs., • The DATA pins on a memory chip are used to access the data.

  10. 1.3.6: Memory • The two primary classes of chips are: ROM(Read only memory) and RAM(Random access memory). • Data is programmed into the ROM chip using a separate ROM programmer. The circuit does not change the contents of the ROM. • PC’s use ROM to store the instructions that constitute their BIOS(Basic input/output system).When power is removed from a ROM chip, it still maintains its data. ROM is nonvolatile. • RAM is often referred to as read/write memory. Unlike ROM, it initially contains no data. Data can flow in to or out of the chip, as opposed to ROM, which are output only. RAM loses its data once power is removed; it is volatile.

  11. Combinatorial Circuit Designs: • Many circuits can be designed using gates and components. Two of these designs are: BINARY CODED DECIMAL(BCD) to 7-segment decode and a simple DATA SORTER.

  12. 1.4.1: BCD to 7-segment Decoder • BCD(Binary coded decimal) to 7-segment decoder is used in digital displays.It converts the binary representation of a decimal digit, 0000 to 1001 to the signals needed to show the digit on a 7-segment LED display. • This circuit is actually seven distinct circuits, one for each segment, a through g. The design process for each is the same. For many applications, it is preferable to use ACTIVE LOW display-that is, a 0 lights the display and a 1 blanks the display.

  13. 7-Segment LED display Patterns: a 0 1 2 3 4 5 6 7 8 9 Segment labels: f b g e c d

  14. 1.4.2: Data Sorter • A simple DATA SORTER will input a 4-bit values and output them in descending order. The basic building block of this circuit is the compare-and-swap modules. It receives two data inputs and compares them using the 4-bit comparator.

  15. Four-input data sorter a b X max X Y max Y min min max X Y min C d max X Y max X Y min min

More Related