1 / 20

240-334 Computer System Design Lecture 3

240-334 Computer System Design Lecture 3. Wannarat Suntiamorntut. Arithmetic for Computer. Implementing the Architecture. The numbers. Binary number (base 2) numbers are finite ( overflow ) fraction and real number

ecraft
Download Presentation

240-334 Computer System Design Lecture 3

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. 240-334Computer System DesignLecture 3 Wannarat Suntiamorntut 240-334 By Wannarat

  2. Arithmetic for Computer • Implementing the Architecture 240-334 By Wannarat

  3. The numbers • Binary number (base 2) • numbers are finite (overflow) • fraction and real number • negative number e.g., No MIPS subi instruction, addi can add a negative number 240-334 By Wannarat

  4. Possible Representations Sign Magnitude One’s complement Two’s complement 000 = +0 000 = +0 000 = +0 001 = +1 001 = +1 001 = +1 010 = +2 010 = +2 010 = +2 011 = +3 011 = +3 011 = +3 100 = -0 100 = -3 100 = -4 101 = -1 101 = -2 101 = -3 110 = -2 110 = -1 110 = -2 111 = -3 111 = -0 111 = -1 Negative and Invert are different! 240-334 By Wannarat

  5. Addition & Subtraction • 7 - 6 {0111 - 0110} = 0001 • two’s complement 0111 + 1010 = 0001 • Overflow n-bit does not yield an n-bit number 0111 + 0001 1000 240-334 By Wannarat

  6. Detecting overflow • No overflow when add positive&negative • No overflow when signs are the same for subtraction • Overflow occur when : - add two positives yield a negative - add two negative gives a positive - subtract negative from positive and get negative - subtract positive from negative get a positive 240-334 By Wannarat

  7. Effect of Overflow • Exception occur (Interrupt) - control jumps to predefined address for exception - Interrupted address is saved • Don’t always to detect overflow - New MIPS instructions: addu, addiu ... 240-334 By Wannarat

  8. ALU • Build ALU support andi, ori instructions 240-334 By Wannarat

  9. Multiplexor • Select one of the inputs to be output, base on control input 240-334 By Wannarat

  10. ALU for Addition instruction • Cout = ab + bcin + acin • Sum = a xor b xor cin 240-334 By Wannarat

  11. ALU for Subtraction instruction • Two’s complement approach : just negative b and ADD 240-334 By Wannarat

  12. Supporting slt 240-334 By Wannarat

  13. 240-334 By Wannarat

  14. MIPS Arithmetic Instruction format 240-334 By Wannarat

  15. Conclusion ALU in MIPS • Use multiplexor to select output we want • efficiently perform subtraction using two’s complement • replicate 1-bit ALU to 32-bit ALU 240-334 By Wannarat

  16. Computation Problem :fast adder • 32-bit ALU faster than 1-bit ALU? • Carry-lookahead adder g = ab, p = a + b c1 = g0 + p0c0 c2 = g1 + p1c1c2 c3 = g2 + p2c2c3 ... 240-334 By Wannarat

  17. 240-334 By Wannarat

  18. Part II : Lecture III 240-334 By Wannarat

  19. Multiplication 0010 (multiplicand) x 1011 (multiplier) ???? 240-334 By Wannarat

  20. Unsign Combinational Multiplier 240-334 By Wannarat

More Related