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CRYO FEMB Updates. University of Hawaii January 22, 2019. FEMB Layout Changes. Original packaging idea for CRYO used CQFP. E.g., CQFP-304: 1.543” x 1.543” Some thermal & CTE considerations have changed baseline strategy. Heat spreading desirable to avoid bubbling. CQFP-304. CQFP-304.
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CRYO FEMB Updates University of Hawaii January 22, 2019
FEMB Layout Changes • Original packaging idea for CRYO used CQFP. • E.g., CQFP-304: 1.543” x 1.543” • Some thermal & CTE considerations have changed baseline strategy. • Heat spreading desirable to avoid bubbling. CQFP-304 CQFP-304
FEMB Layout Changes • Original packaging idea for CRYO used CQFP. • E.g., CQFP-304: 1.543” x 1.543” • Some thermal & CTE considerations have changed baseline strategy, e.g., heat spreading desirable to avoid bubbling.
Bare die in Substrate + FR4 *From Dionisio
Bare die in Substrate + FR4 *From Dionisio
Cost of Fabrication? • Initially assumed we would receive packaged parts: • Some concern originally about cost of fab for wirebonding directly to board, as it requires tighter tolerances, non-standard fab options. • After some discussion with other groups/projects, this may not be as big an issue at the pad pitch of the CRYO. • Working to press ahead through design with simple chip-on-board to get cost estimates for fab. • Can easily be modified from there to include cutout for substrate if cost is not prohibitive. • Will also need coordination with wire bonding vendor to ensure geometry is relatively easy/cheap to bond.
Status (Design and Fabrication) • For design: • FEMB design files: all files received. • FEMB mezzanine files: pdf files received. • Mainly just need cable definitions and interfaces, probably don’t need full schematic/layout files. • CRYO footprints and pinouts from SLAC. • Any feedback at SLAC on substrates? • UH to initiate necessary inquiries with wire bonding vendors. • Jeff Kleyner (Ph.D. Student in EE) has joined, and is working on updating the existing design. • Schematic is being translated from DxDesigner to PADS Logic. • Layout files appear fully reusable. • First priority is layout mature enough to estimate chip-on-board fab pricing, ensure that it is not prohibitive. Target having CRYO PCBs in hand ahead of receiving modified WIB from BNL (~2 months per Matt W.’s last update).
Other Dependencies • Preparation for testing: • Still need from BNL: • WIB firmware – asked a couple times last year, but did not receive response… will reach out again. • WIB documentation (i.e., how to use). • Coordination with SLAC on firmware development for WIB. • Feedback from SLAC from initial standalone tests. • Hardware for testing: • Need from BNL: • Modified WIBs (~2 months per Matt W.) – how many did we request? • For cold testing, CTS? • Can also do LN tests if CTS is unavailable. • Personnel: Testing support from Shahab Kohani (Postdoc), Jeff Kleyner (Grad). Target having CRYO PCBs in hand ahead of receiving modified WIB from BNL (~2 months per Matt W.’s last update).