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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design. Course and contest Results of Phase 3 Nam Pham Van. Change of coefficient. Reduce an addition to one shift operation On FPGA no noticeable influence On VLSI noticeable power reduction. Design assumption. Benchmark:.
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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design Course and contest Results of Phase 3 Nam Pham Van
Change of coefficient • Reduce an addition to one shift operation • On FPGA no noticeable influence • On VLSI noticeable power reduction
Design assumption Benchmark: • Assumption: • Increase the frequencybetter • Lower the voltage more effective Metric
Behaviorofthemetric • Metric is better with lower voltage
Design & architecture • Brent Kung adder (a parallel prefix adder): • Minimum number of nodes (implies minimum area) • Efficient • Suitable for VLSI • Implemented version: • 10 bit • 11 bit • 16 bit
Results of ASIC design • Synopsys Configuration: • Library: • COREHVTtyp10V • Vdd = 1.0 V • Power: • set_max_dynamic_power 0 mW • set_max_leakage_power 0 mW • Compile: • compile_ultra
Future improvements • Dynamic Voltage Scaling (DVS) • Dynamic Frequency Scaling (DFS) • Reducing the parasitic capacitance C • Special low power design e. g. stack-effect • Reduction of unnecessary switching activity