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First Timepix3 results. Wafer#0 → AAPVX6H. @NIKHEF. Chip Mounted @CERN W0_J6. Some photos. Diced chips in gelpack. First tests. Power ON -> “No Smoke” ~780mA after Reset (no clock) Blocks tested: SLVS IO receiver at 40MHz (40Mbps) Driver up to 320MHz (640Mbps)
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Wafer#0 → AAPVX6H @NIKHEF Chip Mounted @CERN W0_J6
Some photos Diced chips in gelpack
First tests • Power ON -> “No Smoke” • ~780mA after Reset (no clock) • Blocks tested: • SLVS IO • receiver at 40MHz (40Mbps) • Driver up to 320MHz (640Mbps) • Command decoder • Receive commands • Sends control commands (END_CMD, ACK_CMD, WRG_CMD and OTHERCHIP_CMD) • Send periphery data output (DAC settings, Timer output…) • PLL • Clearly see in the scope clock multiplication working 40, 80, 160 MHz • Output block • Data received @640Mbps • End Of Column • CTPR load • CTPR read
Data Packet=0x00000 (40-bits) Timer:RequestTimeLow=0x44 END_CMD=0x71 Timer:RequestTimeLow=0x44 ChipID=0x0000
Summary • Start testing on Monday morning • 2 chip mounted: 1 @CERN and 1 @Nikhef • Timepix3 periphery is working as expected • Periphery is ~80% tested • Pixel Matrix not yet tested