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Explore how IRAM Architecture and FPGA-based Chip Design reduce processor-memory gap, improving system performance and efficiency. Memory-logic integration is key to solving this gap, with potential for wider exploration in research.
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The Memory-Processor Gap • Processor speed increases by 60% per year while memory access speed increase is 10% • Most techniques focus on latency tolerance which exposes bandwidth limitations • The most obvious solution is to reduce traffic to off-chip memory
On-chip DRAM cache Compatible with current architecture Allows bigger caches in same die area Reduces processor-memory gap problem by reducing traffic to off-chip memory FPGA-based chip Uses standard FPGA chips Allows good memory and logic locality Eliminates difference in fabrication problem Integrates memory and logic onto a single chip easily Experimental Plans
Conclusions • Memory-logic integration is possibly the best solution • Much more research still needs to be done in this area • There are several options that are relatively unexplored • Research must continue in this area as the memory-processor gap widens every year