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A Low Supply Voltage CMOS Bandgap And Sub-threshold Voltage Reference

A Low Supply Voltage CMOS Bandgap And Sub-threshold Voltage Reference. EE610 Course Project. Anurag Sindhu(Y5106) Ashish Bhatia (Y5121). Basic Idea. For generating a temperature independent voltage reference, we need Voltage with negative TC (Temp Coeff.) : V 1

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A Low Supply Voltage CMOS Bandgap And Sub-threshold Voltage Reference

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  1. A Low Supply Voltage CMOS Bandgap And Sub-threshold Voltage Reference EE610 Course Project Anurag Sindhu(Y5106) Ashish Bhatia (Y5121)

  2. Basic Idea • For generating a temperature independent voltage reference, we need • Voltage with negative TC (Temp Coeff.) : V1 • Voltage with positive TC : V2 • A circuit to linearly combine them(a1V1 + a2V2) such that net voltage has (almost) zero TCδ(a1V1 + a2V2) /δT = 0

  3. Negative TC Voltage • VBE of BJT decreases with temperature

  4. Positive TC Voltage • VBE1 – VBE2 = VT ln(Jc1/Jc2) = VPTAT increases with temp if Jc1 >Jc2 • In our case Jc1/Jc2 = (Ic1*A2)/(Ic2*A1) = 10*10 = 100 • => VBE1 – VBE2 = 120 mV (approx) at 300K

  5. Voltage to Current Conversion I = k(VBE1-(VBE2-VTHP2)-VTHP1)2 = k(VBE1-VBE2) 2 …(1)

  6. Current to Voltage Conversion (with Amplification) 5I = 0.2k(VBG-(VBE2-VTHP2)-VTHP6)2= 0.2k(VBG-VBE2)2 …(2)

  7. I = k(VBE1-VBE2)2 …(1) 5I = 0.2k(VBG-VBE2)2 …(2)Solving (1) and (2)VBG = VBE2 + 5(VBE1-VBE2)

  8. I = k(VBE1-VBE2)2 …(1) 5I = 0.2k(VBG-VBE2)2 …(2)Solving (1) and (2)VBG = VBE2 + 5(VBE1-VBE2) decreases with Temp 2mV/K increases with Temp 0.4 mV/K

  9. 5I 2I 5I 10 I 10 I 11 I I I I I I I M9 M10 M11 M12 Mc M1 M2 M6 Q2 M7 M8 M4 M3 Q1 M5

  10. Our Innovation • To generate dual voltage references • Bandgap reference (1.157 V) • Sub-threshold reference (326 mV)

  11. Circuit for sub-threshold reference M13 and M14 acts as Voltage Divider to producesub threshold output = 326 mV

  12. Complete Circuit

  13. Simulation Results

  14. Vmax = 1.158 VVmin = 1.140V Variation = 18 mV (from -25C to 75C)

  15. Vmax = 327.5 mVVmin = 315.5 mVVariation = 12 mV (from -25C to 75C)

  16. Vmax = 1.104 mVVmin = 1.084 mV Variation = 20 mV (Vdd varying from 1.3 to 1.5V)

  17. Vmax = 308 mVVmin = 292 mV Variation = 16 mV (Vdd varying from 1.3 to 1.5V)

  18. Advantages • Does not use Resistance or Op Amp => can be fabricated on any Digital CMOS technology • Dual Voltage reference available => can be used in low power systems • Devices operate at sub-threshold voltage during low computation periods • Jump to saturation mode during high computation periods

  19. Main Challenge • Short Channel Transistors do not follow square law characteristics => adjustment to ideal W/L values, through iteration for getting desired current

  20. References • “A Low-Supply-Voltage CMOS Sub-Bandgap Reference”, Adriana Becker-Gomez, T. Lakshmi Viswanathan, T. R. Viswanathan, IEEE Transactions On Circuits And Systems—II: Express Briefs, Vol. 55, No. 7, July 2008 • “Design of Analog CMOS Integrated Circuits”, Behzad Razavi, Tata McGraw Hill Publishers (Edition 2002)

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