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Width Minimization O n reconfigurable Single-Electron Transistor Arrays. Speaker: Chain Wei Liu Advisor: Dr. Chun-Yao Wang 2013/06/03. OUTLINE. Introduction Width minimization approach Problem Future work. Introduction. current detector. SET: Single-Electron Transistor
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Width Minimization On reconfigurable Single-Electron Transistor Arrays Speaker: Chain Wei Liu Advisor: Dr. Chun-Yao Wang 2013/06/03
OUTLINE • Introduction • Width minimization approach • Problem • Future work
Introduction current detector • SET: Single-Electron Transistor • An SET array can be presented as a graph composed of hexagons 1
Example • An example of a XOR b: • ab’+ba’ active high a active low short • All sloping edges areconfigurable • short, open, active (high or low) • Active edges at the same row are controlled by a single variable open b
Mapping constraint • Granularity constraint • Two edges are configured simultaneously • The combination of n.left and n.right, (n.left,n.right), must be one of (high, low), (low, high), (short, short),and (open, open), where n is a node in the SET array. • Fabric constraint • (high, low) and (low, high) cannot simultaneously appear in a row
OUTLINE • Introduction • Width minimization approach • Problem • Future work
Key idea • Relax mapping constraint • More Branch-and Share can be used • Limiting expansion of the SET array • In the previous work, for simplification, they allow only one of (high, low) and (low, high) to appear in an SET array • For width minimization, we allow both (high, low) and (low, high) to appear in an SET array
Example-share collection 110100 P1 1100-- P2 1111-- P3 111000 P4 11101- P5 110100 P1 1100-- P2 1111-- P3 111000 P4 11101- P5 110100 P1 1100-- P2 1111-- P3 111000 P4 11101- P5 Share collection
Determine the SET array architecture • The first row is always configured as (high,low) • When there is a Branch-and-share, determine the row structure to meet the Branch-and-share requirement • Other row structures are determined as the previous row structure if over half of variables changes their value • Otherwise, inverse the row structure
Example-determine architecture H,L L,H H,L L,H L,H H,L 110100 P1 1100-- P2 1111-- P3 111000 P4 11101- P5
Product term order determination • Determine the product term order by expansion level, share collection and group relation • Priority: share collection > group relation > expansion level
Example-product term reordering H,L L,H H,L L,H L,H H,L 110100 P1 1100-- P2 1111-- P3 111000 P4 11101- P5 P1~P5 111 110 P3~P5 1110 1111 P1 P2 110100 P1 110011 P2 111111 P3 111000 P4 111011 P5 P1: 4 P2: 3 P3: 3 P4: 4 P5: 5 P4 P5 P2->P3->P5->P4->P1 P3
Example-mapping result Previous work Width optimization approach Width=13 Width=9
OUTLINE • Introduction • Width minimization approach • Problem • Future work
Problem • The previous product term function will cause SET array be Nonequivalence in some benchmarks • The product term ordering may destroy the consecutive Branch-and-Share relationship • The configure function may destroy the Branch-and –Share relationship • To get better result, we may need to backtrack while configuring
Width optimization approach • Configure • Relax configuring constraint • Backtrack • Allow reconfigure product terms
OUTLINE • Introduction • Width minimization approach • Problem • Future work
Future Work • Solve above problems