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Lecture 9: Sequential Networks: Implementation

Lecture 9: Sequential Networks: Implementation CSE 140: Components and Design Techniques for Digital Systems Fall 2014 CK Cheng Dept. of Computer Science and Engineering University of California, San Diego. Implementation. Format and Tool Procedure Excitation Tables Example.

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Lecture 9: Sequential Networks: Implementation

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  1. Lecture 9: Sequential Networks: Implementation CSE 140: Components and Design Techniques for Digital Systems Fall 2014 CK Cheng Dept. of Computer Science and Engineering University of California, San Diego

  2. Implementation • Format and Tool • Procedure • Excitation Tables • Example

  3. Canonical Form: Mealy and Moore Machines Mealy Machine: yi(t) = fi(X(t), S(t)) Moore Machine: yi(t) = fi(S(t)) si(t+1) = gi(X(t), S(t)) x(t) x(t) C1 C2 y(t) C1 C2 y(t) CLK CLK S(t) S(t) Moore Machine Mealy Machine

  4. iClicker In the logic diagram below, a D flip-flop has input x and output y. A: x= Q(t), y=Q(t) B: x=Q(t+1), y=Q(t) C: x=Q(t), y=Q(t+1) D: None of the above y x D Q CLK

  5. Understanding Current State and Next State in a sequential circuit Preparing for tomorrow according to our effort in today today sunrise

  6. Implementation Format Canonical Form: Mealy & Moore machines State Table  Netlist Tool: Excitation Table x(t) CLK C1 C2 y(t) Q(t) Q(t+1) = h(x(t), Q(t)) Circuit C1 y(t) = f(x(t), Q(t)) Circuit C2

  7. Implementation Tool: Excitation Table State Table x(t) C1 CLK Q(t) Find D, T, (S R), (J K) to drive F-Fs

  8. Implementation Tool: Excitation Table State Table CLK Excitation Table x(t) Q(t) C1 T(t) Q(t) Example with T flip flop

  9. Implementation Tool: Excitation Table Implement combinational logic C1 D(t), T(t), (S(t) R(t)), (J(t) K(t)) are functions of (x,Q(t)) CLK Excitation Table x(t) C1 Q(t) Q(t)

  10. Implementation: Procedure Problem: Given a state table, we have NS: Q(t+1) = h(x(t),Q(t)) We find D, T, (S R), (J K) to drive F-Fs from Q(t) to Q(t+1). Excitation Table: The setting of D(t), T(t), (S(t) R(t)), (J(t) K(t)) to drive Q(t) to Q(t+1). We implement combinational logic C1 D(t), T(t), (S(t) R(t)), (J(t) K(t)) are functions of (x,Q(t)). State Table => Excitation Table

  11. Implementation: Procedure Problem: Given a state table, we have NS: Q(t+1) = h(x(t),Q(t)) We find D, T, (S R), (J K) to drive F-Fs from Q(t) to Q(t+1). Excitation Table: The setting of D(t), T(t), (S(t) R(t)), (J(t) K(t)) to drive Q(t) to Q(t+1). We implement combinational logic C1 D(t), T(t), (S(t) R(t)), (J(t) K(t)) are functions of (x,Q(t)). State Table => Excitation Table

  12. DTSRJK NS Q(t+1) PS Q(t) PS Q(t) NS Q(t+1) Implementation: Procedure F-F State Table <=> F-F Excitation Table DTSRJK • D F-F • D(t)= eD(Q(t+1), Q(t)) • T F-F • T(t)= eT(Q(t+1), Q(t)) • SR F-F • S(t)= eS(Q(t+1), Q(t)) • R(t)= eR(Q(t+1), Q(t)) • JK F-F • J(t)= eJ(Q(t+1), Q(t)) • K(t)= eK(Q(t+1), Q(t))

  13. JK 00 0 1 11 1 0 10 1 1 01 0 0 0 1 Q(t+1) Q(t) Q(t+1) NS PS 0 0- -1 1 1- -0 0 1 Q(t) JK Excitation Table State table of JK F-F: Excitation table of JK F-F: If Q(t) is 1, and Q(t+1) is 0, then JK needs to be -1.

  14. Excitation Tables and State Tables State Tables: Excitation Tables: SR SR Q(t+1) NS SR PS PS 0 0- 01 1 10 -0 00 0 1 01 0 0 10 1 1 11 - - 0 1 0 1 Q(t) Q(t) Q(t+1) T T Q(t+1) NS T PS PS 0 0 1 1 1 0 0 0 1 1 1 0 0 1 0 1 Q(t) Q(t) Q(t+1)

  15. Excitation Tables and State Tables Excitation Tables: State Tables: JK JK Q(t+1) NS JK PS PS 0 0- -1 1 1- -0 00 0 1 01 0 0 10 1 1 11 1 0 0 1 0 1 Q(t) Q(t) Q(t+1) D D Q(t+1) NS D PS PS 0 0 0 1 1 1 0 0 0 1 1 1 0 1 0 1 Q(t) Q(t) Q(t+1)

  16. Implementation: Procedure • State table: y(t)= f(Q(t), x(t)), Q(t+1)= h(x(t),Q(t)) • Excitation table of F-Fs: • D(t)= eD(Q(t+1), Q(t)); • T(t)= eT(Q(t+1), Q(t)); • (S, R), or (J, K) • From 1 & 2, we derive excitation table of the system • D(t)= gD(x(t),Q(t))= eD(h(x(t),Q(t)),Q(t)); • T(t)= gT(x(t),Q(t))= eT(h(x(t),Q(t)),Q(t)); • (S, R) or (J, K). • Use K-map to derive optional combinational logic implementation. • D(t)= gD(x(t),Q(t)) • T(t)= gT(x(t),Q(t)) • y(t)= f(x(t),Q(t))

  17. J Q Q’ K C1 T Implementation: ExampleImplement a JK F-F with a T F-F Q Q(t+1) = h(J(t),K(t),Q(t)) = J(t)Q’(t)+K’(t)Q(t) Implement a JK F-F: JK JK PS 00 0 1 01 0 0 10 1 1 11 1 0 0 1 Q(t)

  18. Example: Implement a JK flip-flop using a T flip-flop Excitation Table of T Flip-Flop T(t) = Q(t) ⊕ Q(t+1) Q(t+1) NS PS 0 0 1 1 1 0 0 1 Q(t) T Excitation Table of the Design id 0 1 2 3 4 5 6 7 J(t) 0 0 0 0 1 1 1 1 K(t) 0 0 1 1 0 0 1 1 Q(t) 0 1 0 1 0 1 0 1 Q(t+1) 0 1 0 0 1 1 1 0 T(t) 0 0 0 1 1 0 1 1 T(t) = Q(t) XOR ( J(t)Q’(t) + K’(t)Q(t))

  19. Example: Implement a JK flip-flop using a T flip-flop T(J,K,Q): K 0 2 6 4 0 0 1 1 T = K(t)Q(t) + J(t)Q’(t) 1 3 7 5 Q(t) 0 1 1 0 J J Q Q’ T K

  20. iClicker • Given a flip-flop, the relation of its state table and excitation table is • One to one • One to many • Many to one • Many to many • None of the above

  21. Next state PS S0 S1 S2 S3 S1 S2 S3 S0 Let’s implement our free running 2-bit counter using T-flip flops S0 State Table S1 S3 S2

  22. S0 S1 S2 S3 S1 S2 S3 S0 Let’s implement our free running 2-bit counter using T-flip flops Current S0 0 0 0 1 1 0 1 1 01 10 11 00 State Table with Assigned Encoding State Table S1 S3 Next S2

  23. Let’s implement our free running 2-bit counter using T-flip flops Excitation table

  24. Let’s implement our free running 2-bit counter using T-flip flops Excitation table

  25. Let’s implement our free running 2-bit counter using T-flip flops Excitation table T0(t) = T1(t) = Q0(t+1) = T0(t) Q’0(t)+T’0(t)Q0(t) Q1(t+1) = T1(t) Q’1(t)+T’1(t)Q1(t)

  26. Let’s implement our free running 2-bit counter using T-flip flops Excitation table T0(t) = 1 T1(t) = Q0(t)

  27. Q0 1 Q T Q’ Q Q1 T Q’ T1 Free running counter with T flip flops T0(t) = 1 T1(t) = Q0(t)

  28. Implementation: State Diagram => State Table => Netlist Pattern Recognizer: A sequential machine has a binary input x in {a,b}. For x(t-2, t) = aab, the output y(t) = 1, otherwise y(t) = 0. Assign mapping a:0, b:1

  29. Implementation: State Diagram => State Table => Netlist Pattern Recognizer: A sequential machine has a binary input x in {a,b}. For x(t-2, t) = aab, the output y(t) = 1, otherwise y(t) = 0. Assign mapping a:0, b:1 • PI Q How many states should the pattern recognizer have • One because it has one output • One because it has one input • Two because the input can be one of two states (a or b) • Three because . .. . . . . • Four because . . . . .

  30. PI Q: How many states should the pattern recognizer have • One because it has one output • One because it has one input • Two because the input can be one of two states (a or b) • Three because . .. . . . . • Four because . . . . .

  31. Implementation: State Diagram => State Table => Netlist Pattern Recognizer: A sequential machine has a binary input x in {a,b}. For x(t-2, t) = aab, the output y(t) = 1, otherwise y(t) = 0. b/1 b/0 S1 S0 a/0 a/0 S2 a/0 b/0

  32. State Diagram => State Table with State Assignment b/1 b/0 S1 S0 a/0 a/0 S2 a/0 State Assignment S0: 00 S1: 01 S2: 10 b/0 a: 0 b: 1 Q1(t+1)Q0(t+1), y

  33. Example 2: State Diagram => State Table => Excitation Table=> Netlist

  34. Q0 D1(t): 0 2 6 4 0 1 - 1 1 3 7 5 0 0 - 0 x(t) Q1 Example 2: State Diagram => State Table => Excitation Table => Netlist D1(t) = x’Q0 + x’Q1 D0 (t)= Q’1Q’0 x’ y= Q1x

  35. Example 2: State Diagram => State Table => Excitation Table => Netlist Q’1 Q0 D0 Q Q’0 D x’ Q’ Q1 y x’ D1 Q D Q0 Q’ Q1 x D1(t) = x’Q0 + x’Q1 D0 (t)= Q’1Q’0 x’ y= Q1x

  36. Example 3: State Diagram => State Table => Excitation Table => Netlist Q’1 Q0 D0 Q Q’0 D x’ Q’ Q1 y x’ b/1 D1 Q D Q0 Q’ b/0 Q1 a/0 a/0 x S1 S0 S2 a/0 • iClicker: The relation between the above state diagram and sequential circuit. • One to one. • One to many • Many to one • Many to many • None of the above b/0

  37. Modified 2 bit counter x(t) Q Q0(t) D Q’ y(t) Q0(t) CLK Q Q1(t) D Q’ Q1(t)

  38. Modified 2 bit counter x(t) Q y(t) Q0(t) D Q’ Q0(t) CLK Q Q1(t) D Q’ Q1(t) y(t) = Q1(t)Q0(t) Q0(t+1) = D0(t) = x(t)’ Q0(t)’ Q1(t+1) = D1(t) = x(t)’(Q0(t) + Q1(t))

  39. input x=0 x=1 PS S0 S1 S2 S3 Netlist State Table  State Diagram  Input Output Relation Characteristic Expression: input x=0 x=1 PS State table 0 0 0 1 1 0 1 1 State Assignment y(t) = Q1(t)Q0(t) Q0(t+1) = D0(t) = x(t)’ Q0(t)’ Q1(t+1) = D1(t) = x(t)’(Q0(t) + Q1(t)) Q1(t) Q0(t) | (Q1(t+1) Q0(t+1), y(t)) Present State | Next State, Output

  40. input x=0 x=1 PS S0 S1 S2 S3 S1, 0 S0, 0 S2, 0 S0, 0 S3, 0 S0, 0 S0, 1 S0, 1 Netlist State Table  State Diagram  Input Output Relation input x=0 x=1 PS State table State Assignment 0 0 0 1 1 0 1 1 01, 0 00, 0 10, 0 00, 0 11, 0 00, 0 00, 1 00, 1 Let: S0 = 00 S1 = 01 S2 = 10 S3 = 11 Q1(t) Q0(t) | Q1(t+1) Q0(t+1), y(t) Present State | Next State, Output y(t) = Q1(t)Q0(t) Q0(t+1) = D0(t) = x(t)’ Q0(t)’ Q1(t+1) = D1(t) = x(t)’(Q0(t) + Q1(t)) Remake the state table using symbols instead of binary code , e.g. ’00’

  41. S2 S3 S0 S1 input x=0 x=1 PS S0 S1 S2 S3 S1, 0 S0, 0 S2, 0 S0, 0 S3, 0 S0, 0 S0, 1 S0, 1 Netlist  State Table  State Diagram  Input Output Relation Given inputs and initial state, derive output sequence

  42. x/y 1/0 1/0 S2 S3 S0 S1 0/0 0/0 0/0 input x=0 x=1 PS S0 S1 S2 S3 S1, 0 S0, 0 S2, 0 S0, 0 S3, 0 S0, 0 S0, 1 S0, 1 Netlist  State Table  State Diagram  Input Output Relation 1/0 (0 or 1)/1 Example: Given inputs and initial state, derive output sequence

  43. Finite State Machine Example • Traffic light controller • Traffic sensors: TA, TB (TRUE when there’s traffic) • Lights: LA, LB

  44. FSM Black Box • Inputs: CLK, Reset, TA, TB • Outputs: LA, LB

  45. FSM State Transition Diagram • Moore FSM: outputs labeled in each state • States: Circles • Transitions: Arcs

  46. FSM State Transition Diagram • Moore FSM: outputs labeled in each state • States: Circles • Transitions: Arcs

  47. FSM State Transition Table

  48. State Transition Table Q1(t+1)= Q1(t)xor Q0(t) Q0(t+1)= Q’1(t)Q’0(t)T’A + Q1(t)Q’0(t)T’B

  49. FSM Output Table LA1 = Q1 LA0 = Q’1Q0 LB1 = Q’1 LB0 = Q1Q0

  50. FSM Schematic: State Register

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