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Status n-XYTER and CBM-XYTER

Status n-XYTER and CBM-XYTER. Christian J. Schmidt et al., GSI Darmstadt. GSI, Darmstadt, Feb. 29 th 2008. n-XYTER / CBM-XYTER. N eutron – X, Y, T ime and E nergy ... R. Architecture:. Front-End: 128 channel charge sensitive front-end for MIPs in Silicon, both polarities

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Status n-XYTER and CBM-XYTER

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  1. Status n-XYTER and CBM-XYTER Christian J. Schmidt et al., GSI Darmstadt GSI, Darmstadt, Feb. 29th 2008

  2. n-XYTER / CBM-XYTER Neutron – X, Y, Time and Energy ... R Architecture: Front-End: • 128 channel charge sensitive front-end for MIPs in Silicon, both polarities • Purely data driven, autonomous hit detection (self triggered) • Peak detection, analogue storage and readout • Average per channel hit rate 160kHz with 10% dead time (determined by pile-up on slow channel) Readout: • Per channel analogue energy and digital time stamp FIFO • De-randomizing, sparcifying Token Ring readout at 32 MHz

  3. Short to Mid Term: n-XYTER  Detector Prototyping • Current n-XYTER, developed for thermal neutron detection (EU-FP6 NMI3 DETNI) • It will serve us to realize various detector prototyping projects within CBM but also FAIR • CBM STS module prototyping • CBM MUCH readout (in particular high density gas detector readout) • CBM MAPMT-RICH • but also other projects as e.g. PANDA GEM TPC or Silicon MVD

  4. Midterm and Beyond: the Dedicated CBM-XYTER • Exploit detector prototyping experiences • Self triggered architecture • Rates adapted • Radiation hard • On chip ADC • Efficient, low lead-count serialized data transfer • DC-coupled double sided Silicon readout

  5. CBM-XYTER Development Collaborators MEPHI Moscow (Eduard Atkin et al) principle tripod collaboration AGH Krakow (Robert Szczygiel, Pavel Grybos) IZT Heidelberg (Peter Fischer et al) GSI Darmstadt (Christian J. Schmidt) coordination

  6. Status of Testing, Chip Availability • n-XYTER has been investigated and tested at Uni-Heidelberg, Uni-Münster, VECC (Kolcatta, India), INP & AGH Krakow, GSI-Detectorlab • No functional flaws seen • cross coupling (in-channel and inter -channel) may increase effective noise figure in current chips, reason to be identified • Temperature coefficient makes current chips less convenient to operate • Complicated Mixed Signal Chip • First 250 chips will rapidly be used up after testing and evaluation • An engineering run will need to supply the bag of chips

  7. The n-XYTER Starter Kit... Steps towards a CBM readout chain: SysCore (Norbert Abel, Udo Kebschull, Andreas Kugel, Dirk Gottschalk) Chip testing at PI Heidelberg and at GSI detectorlab

  8. Analogue Signal Sequence (Test Channel) Testpulse Release Slow Shaper Fast Shaper Discriminator Output

  9. Analogue and Digital Signal Out at 32MHz operation at 250 MHz Clk speed Delay 4ns DataValid clk128MHz clk32MHz

  10. First n-XYTER connected to Silicon Strips in Krakow ASICs and Detector,Sucima Readout (Adam Czermak, Robert Szczygiel, Krzysztof Kasinski and others) CBM Collaboration Meeting 26.02.2008 Krzysztof Kasiński (AGH Cracow) cincian@o2.pl

  11. The plan to get more chips for detector prototyping • Re-submission of MPW masks with modified process options (non opto) will quickly: • clarify current process related uncertainties • yield enough chips for prototyping and beam tests this year • An engineering run prepared for submission in September 2008 will provide abundant chips for prototyping even of larger detector systems

  12. FEB-Developments (n-XYTER based) • FEB starter kit (Rafal Lalik) one-chip board for evaluative needs. • 4chip FEB for gas detector readout • 4chip FEB for Silicon detector readout, double sided • Flexcable as an alternative to PCBs: Studbonding of chips to micro cables

  13. Current CBM-XYTER development issues • ADC or Time over Threshold (TOT) architecture for signal conversion? • What is an adequate scheme to daisy-chain various chips for a bandwidth charing data transfer over one link? • Even though everybody celebrates the novel funding sucesses of FAIR, the money still has a long way to go until it may be accessible for our partners in Krakow and Moscow! • Realize radiation hardness tests on the TRAP chip to quantify hardness for UMC 0.180 Fundamental architectural bifurcation: TOT promises far less architectural overhead and thus substantial power saving. Yet the ADC appears crucial if resolution beyond even 5 bit is targeted. Higher resolution TOT tends to result in non equal bin-width We will need to evaluate these options from the detector side.

  14. Serious Externally Determined Issues • Financing promises need to be put in action • National funding agencies must get moving to channel money to the working groups • Institutes need to express commitment For the CBM-XYTER development be given priority by contributors, We are going... but yet with handbrakes on....

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