110 likes | 317 Views
E N D
National Changhua University of EducationGraduate Institute of Integrated Circuit DesignA 0.1 -23 GHzSiGe BiCMOS Analog Multiplier and Mixer Based on Attenuation-Compensation Technique IEEE Radio Frequency Integrated Circuits Symposium 2004Ming-Da Tsai, Chin-Shen Lin, Chi-Hsueh Wang, Chun-Hsien Lienand Huei Wang Adviser:Zhi-Ming Lin postgraduate:Jhih-Yuan Lyu E-Mail:m94662010@mail.ncue.edu.tw May 14th, 2007
Outline • Abstract • Introduction • Mixer schematic • Chip micrograph • Measurement • Circuit performance • Conclusion • References
Abstract • 0.35-um SiGe BiCMOS • LC ladder matching networks • Conversion Gain can achieved 19 dB with a 3-dB bandwidth from 0.1 to 23 GHz • Attenuation-Compensation Technique • Chip area is 1.5 ×1 mm2
High gain bandwidth product Introduction The speed of a device is typically quantified by its maximum unity gain cut-off frequency (fT ) or maximum oscillation frequency (fmax) This work:highest GBP of operation among previously reported MMIC mixers
Gilbert circuit Good isolation High gain CG=(2.gm.R)/π Gm=ID/VT Mixer schematic Buffer matching networks Increase coversion gain DC Bias Charge-injection method promote the overall conversion ID ID Attenuation-compensation:In order to promote bandwidlh and conversion gain LC ladder T-section Transmission line matching networks Twice ID CG Increase Current mirror To stabilize current Increase IIP3 CG=(2.gm.R)/π gm increase
Chip micrograph BJT Vcc Inductor RF LO
Measurement LO:0dBm RF: 10GHz CG:20dB CG:20dB LO:0dBm Conversion Gain can achieved 19 dB with a 3-dB bandwidth from 0.1 to 23 GHz
Conclusion • 0.35-um SiGe BiCMOS • Attenuation-compensation method • LC ladder matching • Highest gain-bandwidthproduct • Fault • Power consumption is too much • Return loss(S11) is not less than -10dB of this broadband mixer