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Adding IP to a Hardware Design

Adding IP to a Hardware Design. Lab 2 Introduction. Introduction. This lab guides you through the process of adding peripherals to an existing processor system via the IP Catalog in XPS. An MHS file will be modified, and design netlists will be created via Platform Generator

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Adding IP to a Hardware Design

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  1. Adding IP to a Hardware Design Lab 2 Introduction This material exempt per Department of Commerce license exception TSU

  2. Introduction • This lab guides you through the process of adding peripherals to an existing processor system via the IP Catalog in XPS. • An MHS file will be modified, and design netlists will be created via Platform Generator • The bitstream will be generated from ISE

  3. Objectives After completing this module, you will be able to: • Add additional IP to a hardware design • Implement the design by utilizing ISE

  4. Add GPIO Cores Add SW code to read state of DIP switches and Push Buttons and display on hyperterm OPB Bus PLB Bus UART GPIO DIP Switches PLB2OPB PPC GPIO Push Buttons PLB BRAM Cntlr PLB BRAM MY IP LEDs PLB BRAM Cntlr PLB BRAM Timer INTC ICON IBA

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