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EDMS 1283934. Outline. Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet. [11]. 2. Outline. Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet. [11]. 3. Motivation. M.
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Outline Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet [11] 2
Outline Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet [11] 3
Motivation M M M Protection system: Monitoring + Actuators If Monitoring detects a fault: Actuators switch off system 1 single link is not reliable enough. 2 redundant links provide required safety ITER Magnets offer a different challenge: Maximize availability Minimize fast discharges Therefore, study of other architectures (2oo2,1oo3, 2oo3, etc). A A A [11] 4
2xPS per CPU 2x PS Periphery (SITOP) 2x CPU 414HF 2x Comm. Proc. 2x Profibus networks Step7 + AWL + CFC +S7 F SW PROFIBUS DP / PROFISAFE SYNCHRO. LINK ET200M SAME 11 INTERFACES FOR DIFFERENT USERS INTERFACE1 INTERFACE2..10 INTERFACE 11 QD FDU 1..9 PC SM 326F 24DI SM 336FAI 6FAI SM 322 DO 8RO SM 326F 10FDO IM 153-2H IM 153-2H QD FDU 1..9 PC SM 326F 24DI SM 336FAI 6FAI SM 322 DO 8RO SM 326F 10FDO IM 153-2H IM 153-2H ET200M SM 323 8 DIDO SM 326F 24DI SM 336FAI 6FAI SM 322 DO 8RO SM 331 8 AI SM 326F 10FDO IM 153-2H IM 153-2H QD FDU 1..9 PC CERN TE-MPE-EP Jonathan Búrdalo jburdalo@cern.ch
Outline Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet [11] 6
DLIB: Purpose • Roles: • Simple interface for user signals with the 2oo3 discharge loops. • Transmit fast discharge requests to different users. • Galvanic Isolation between Users and PLC. • Unique way of dealing with client diversity (ie. different interlocks systems, electronics, voltages…). • Independent of upgrades at the user side. • Responds to required dependability and provides safe and reliable interlocking in both directions. • Simplified test and commissioning (common diagnostics and monitoring). • Remote test facility as from the level of the client connection. [11] 7
DLIB: General Diagram DL+ IN OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER TO_USER +/- DL+ OUT LOOP BREAKER(Optocoupler) FPGA (Test & Monitoring) TRIGGER SCHMIDT PROFINET DL- IN 2oo3 LOGIC DL- OUT TRIGGERSCHMIDT FROM_USER +/- RELAY OPTOCOUPLER TRIGGER SCHMIDT TestControlTestPattern [11] 8
DLIB: How does it work? DL+ IN OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER TO_USER +/- DL+ OUT LOOP BREAKER(Optocoupler) FPGA (Test & Monitoring) TRIGGER SCHMIDT PROFINET DL- IN 2oo3 LOGIC DL- OUT TRIGGERSCHMIDT FROM_USER +/- RELAY OPTOCOUPLER TRIGGER SCHMIDT TestControlTestPattern [11] 9
DLIB: from USERS to Interface • Users send status through 3 independent Current Loops. • Current limited by the interface box (fixed current source). • Design used at CERN with success (more than 220 similar interface boxes in use). • 2oo3 Logic opens discharge loop.
DLIB: General Diagram DL+ IN TVS OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER TO_USER +/- DL+ OUT LOOP BREAKER(Optocoupler) FPGA (Test & Monitoring) TRIGGER SCHMIDT PROFINET DL- IN 2oo3 LOGIC DL- OUT TRIGGERSCHMIDT FROM_USER +/- TVS RELAY OPTOCOUPLER TRIGGER SCHMIDT TestControlTestPattern
DLIB: from Interface to USERS • Transmit to user the status of the discharge loop links. • 1 to 1 because of dependability requirements. • Users MUST make the 2oo3 evaluation of the signals. • Optocoupler acting as dry contact and galvanic isolation with the User
DLIB: General Diagram DL+ IN TVS OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER TO_USER +/- DL+ OUT LOOP BREAKER(Optocoupler) FPGA (Test & Monitoring) TRIGGER SCHMIDT PROFINET DL- IN 2oo3 LOGIC DL- OUT TRIGGERSCHMIDT FROM_USER +/- TVS RELAY OPTOCOUPLER TRIGGER SCHMIDT TestControlTestPattern [11] 13
DLIB: Test and Monitoring • The Prototype V1 Interfaces had a Profibus slave. • V2 uses PROFINET with a new ASIC called TPS-1. • 16 bits of data in each direction. • Status of discharge loop, clients and extra info (temp, use of 2oo3 logic, configuration…). • Managed by FPGA, Actel ProASIC3. • Due to time stamping limitations of this solution, and the availability of a new chip, Prototype V2 uses a ITER compliant solution based on Profinet (Industrial Ethernet based Fieldbus). [11] 14
DLIB: General Diagram DL+ IN TVS OPTOCOUPLER TRIGGER SCHMIDT OPTOCOUPLER TO_USER +/- DL+ OUT LOOP BREAKER(Optocoupler) FPGA (Test & Monitoring) TRIGGER SCHMIDT PROFINET DL- IN 2oo3 LOGIC DL- OUT TRIGGERSCHMIDT FROM_USER +/- TVS RELAY OPTOCOUPLER TRIGGER SCHMIDT TestControlTestPattern [11] 15
DLIB: Connectors • Use compact and fully enclosed mechanics. • BURNDY connectors offer good EMC and dependability. • 8 and 12 pins, male and female, to avoid misconnections. • Diagnostics port in front panel for monitoring with Profinet. [11] 16
Outline Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet [11] 17
Experience from first Prototype • The first prototype was assembled and tested thoroughly. • Small test board with switches and LEDs to simulate the discharge loop and the users (at 24 V and 5 V). • Everything “analogue” works according to specifications. • Profibus link has been tested successfully as well. • Integration and tests with PLC were done by M. Zaera in Valencia. • A first version is installed at ITER since October for the HTS current leads tests. This will serve as a real test of the devices and architecture. • PLC + 2 DLInterface Boxes configured with 1oo2 Logic. • It “survived” a Preliminary Design Review at ITER. [11] 18
Outline Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet [11] 19
SecondPrototype • Design is finished and we manufactured 5 units that are working and ready for use. • The analogue part and interfaces with discharge loop and clients remain mainly unchanged except for small tweaks. • The functionality it’s the same. It can work together with a first prototype. • Main difference is the use of Profinetinstead of Profibusfor monitoring. • A brand new chip, TPS-1 from Renesas is used to manage the Profinet stack. • As it’s Ethernet based: substitution of the frontal DB-9 connector for 2 RJ-45 ports. • Allows precisetimestamping of 1ms or less. (to be tested yet) • Much easier and faster to implement from the PLC point of view. • 4 devices will be taken to ITER next week andsent to the different clients for early testing of the interface.
Outline Motivation and overview Discharge Loop Interface Box in detail First prototype Second prototype Profinet [11] 21
Profinet Profinet offers several advantages over Profibus:
TPS-1 This brand new chip is in charge of the Profinet stack. 196 pins 1mm pitch BGA package + 2 Fast Ethernet ports. Documentation has been quite a challenge (missing information). A lot of emails exchanged with support and several surprises. Frist time programming of the chip is tedious. But then it works incredibly well. Next Steps: Try the Isochronous Real Time mode (to achieve 1 ms sync) Test with a Siemens PLC and play around with this synchronization options.
End THANKS FOR YOUR ATTENTION! [11] 24