220 likes | 335 Views
IC Technology Enables New Programmable DSP Solutions. Wim Roelandts CEO Xilinx Inc., San Jose, CA. Off the shelf devices Faster time-to-market Rapid adoption of standards Real time prototyping. Critical Factors for DSP Solutions. Flexibility - DSP Processors. Less performance
E N D
IC Technology Enables New Programmable DSP Solutions Wim Roelandts CEO Xilinx Inc., San Jose, CA
Off the shelf devices Faster time-to-market Rapid adoption of standards Real time prototyping Critical Factors for DSP Solutions Flexibility - DSP Processors • Less performance • Sequential processing • Complex real-time software • Extra power dissipation Performance - Custom ICs • Parallel processing • Support high data rates • Optimal bit widths • No real-time software coding • NRE (Custom IC) • Long development cycle • Can’t test in real time • No mistakes permitted
Critical Factors: Market Validation $10 Billion 1998 Total DSP IC Sales $6.2B • Demand for flexibility - 38% of market and growing • Forced into custom IC to achieve performance • Performance requirements are increasing $3.8B FLEXIBILITY DSP Processors PERFORMANCE Custom ICs Data rates are above 1 MHz in 26% of new design starts - Source: Forward Concepts 1997 survey
Traditional DSP Solution Roadmap DSP Processors Designer must choose between flexibility and performance Flexibility 1981 First Software DSP 1997 First use of multiple MAC units Custom ICs 2 micron 0.25 micron Performance
FPGAs Offer Flexibility and Performance DSP Processors FPGAs 1000 1998 4085 1996 1981 Flexibility 3090 1989 Custom ICs Performance
FPGAs Offer the Best of Both Worlds Flexibility of DSP Processors • Off the shelf devices • Faster time-to-market • Rapid adoption of new standards • Real time prototyping Performance of custom ICs • Parallel processing • Support high data rates • Optimal bit widths • No real-time software coding
1997 survey concluded that FPGAs are used for new DSP applications as often as custom ICs and 33% as often as DSPs. Source: Forward Concepts Increasing FPGA DSP Design Starts Annual FPGA DSP Designs Starts Source: Xilinx Estimate 1996 1997 1998 1999
New FPGAs DSP Features Block RAM Block RAM Block RAM • Distributed RAM - FIR Filter • Block RAM - FFT buffers • Shift registers - D.A. & serial • Multiply “AND” - 200 MHz • DLL - Multi-rate clocks Logic Cell: Look-up table or Distributed RAM Programmable Interconnect
Flexibility: Design in a System-Level DSP Environment DSP Tools Optimal Bit Widths FPGA
FPGA Advancements FPGA technology has seen dramatic changes in the last 2 years - with more to come! 1996 1998 1999 2002 Density (System Gates) 50K 1M 2M 10M MACs / device (Billions) 1 27 68 500 Cost (Gates/$) 300 4K 10K 40K Cost(Million MACs/$) 6 100 340 2,000 2 Billion Programmable MACs for $1.00 in 2002
Moore’s Law: Device Capacity Doubles For The Same Price (Every 18 Months) 1,200 1,000 “Unlimited” supply 800 600 Millions of Transistors 400 200 HistoricallyCorrect 0 1985 1990 1995 2000 2005 2010 Today
Trading “Area” for “Performance” X+ Processor requires a >10 GHz Clock for equivalent performance Area(Free Transistors) FPGA: Parallel Processing 200 MHz Clock DSP Processors: Sequential Processing X+ 500 nsec Time 5 nsec X+ Multiply Accumulates
Performance Comparison 30,000 27,000 25,000 FPGA 20,000 Millions of MACs per Second 15,000 10,000 DSP Processors 3200 5,000 2000 120 400 50 0 1 MAC 3090 uP FPGA 1989 2 MACs 4085 uP FPGA 1996 8 MACs V1000 uP FPGA 1999
Internet Reconfigurable LogicA new application space for FPGAs WWW IRL JBITs Java API Virtex FPGAs
Use of Reconfigurable Logic Spectrum of Reconfiguration Once in a while Turn-on Application Tasks Continuous Field Upgrades AdaptiveProducts Multi-personalityProducts ReconfigurableComputing EvolvingLogic • Cost effective field upgrades • New business model • New types of products • Mind-boggling opportunities in the long term
Any Network Deviceor Cellular Infrastructure • Remote Station Access • Satellite • Cell Stations • Radio Towers • Network Computers • Benefits • Add new features • Support new standards • Bug fixes • System maintenance
FPGA For Communications Applications • Develop advanced DSP algorithms and test in real time • Migration of digital processing toward antenna • More digital, less analog • Multiple & smart antenna processing • Better spectrum utilization • Higher performance filters, high density signal constellations • Advanced error control - Turbo codes and MAP decoders • Software / configurable radio • Multiple modulation, error correction and data encryption schemes with one platform
4 Million Programmable Gates100 Billion MACs Configurable - Software RadioReconfigurable Satellite Modem
Communications Benchmarks 1024-point, 16-bit complex FFT • 10 microsecond transform time • Single device solution in the largest Virtex device • Datapath and all data storage on-chip Heterodyne + 20:1 polyphase decimating FIR • 20 polyphase arms, 24 taps per arm • 8-bits I-Q data, 8-bit coefficients • 28,800 Million MACs in actual design • Single device solution in the largest Virtex device • Includes Heterodyne, Direct Digital Synthesizer and Complex Polyphase Decimator
Video and Image ProcessingApplications • Exponential increase in performance needs • 2-Dimensional algorithm (2D FIR, 2D DCT, Wavelet) • Larger computational mask • Real time image processing • Emerging standards • JPEG2000, MPEG4 • HDTV FPGA Based Image Processing
Video and Image Processing Benchmark Image Processing • 2D Filter / Correlator (12 x 12 Mask) • 1024 x 1024 x 12 bits at 60 frames/second • 8,640 Million MACs • 2 Channels possible in the largest Virtex device Video Conferencing • 5-stage, 2D Wavelet Transform for Compression • NTSC/PAL 768 x 288 x 30 bits at 50 frames/second • 1,688 Million MACs • 8 Channels possible in the largest Virtex device
Conclusion • FPGAs offer flexible high performance solutions today • Moore’s law, New generation FPGAs, tools, and cores make “FPGA DSP” a viable solution • Results: • High performance programmable solutions • Low cost, low power high performance solutions • IRL enables field upgradability