Final Presentation

1. Final Presentation Fourth Order Very Fast Voltage Regulator for RF PA Performed by: Tomer Ben Oz Yuval Bar-Even Guided by: Shahar Porat

2. Background • Mobile devices such as smartphones, tablet and laptop required to support wireless communication, and yet, to be able to run for a long period of time with out charging. • One of the most energy consumer in wireless module is the Power Amplifier (PA) that connected to the RF antenna. • Recent trend to reduce the total power of the PA, is by applying Envelope tracking (ET) on the PA supply level. By using this technique, the power of the PA will be change as a results of the required power for transmitting. • In order to apply high efficiency ET, there is a need to use Switching Voltage Regulator (SVR), and not Linear Voltage Regulator (LVR). • In order to reduce frequency switching noise on the PA supply, a 4th order SVR is being proposed.

3. Project target • Develop a 4th order, high bandwidth Switching Voltage Regulator (SVR), that will be able to supply RF PA, as describe in the figure below.

4. Project objectives • Design and stabilize a high efficiency, high BW fourth order voltage regulator. • Build a good understanding on how each component affects the stability and accuracy for the “real world” implementation of the voltage regulator.

5. Design Requirements • Very low power consumption. • Ripples and overshoot of below 5%. • SSE of at least 2%. • Phase margin of at least 35. • 1 [MHz] envelope tracking bandwidth.

6. The phases of the project • Simple closed loop design • Buck converter • Adding a compensator • Fourth order system • Adding Equivalent Series Resistance

7. Working environment • Simulink via Matlab • Cadence’s virtuoso.

8. Simple closed loop design • Understanding The Principle

9. Simple closed loop design • Advantages: • High Bandwidth • Low Overshoot • Simple to design • Disadvantage: • Power Consumption

10. Buck converter - Transient

11. Buck Converter – Block Diagram • Our Buck Simulink implementation

12. Buck converter - RLC

13. Buck converter - PWM Vc A B

14. -Buck converter Frequency domain

15. Buck converter simulation • Buck output for given sine wave input

16. Buck converter – Linear Model • Comparator & Driver Replaced by Constant Gain

17. Buck converter - Open Loop Bode • On the Cross Over point the phase margin is 8

18. So What Is A Compensator

19. Compensator – Bode Diagram • Locating the Zeroes give the open loop system 90boost

20. Considerations of choosing the locations of the Zeros • The zeros should give a phase boost of at least 35 at the Cross Over. • There is a need to filter the switching frequency and it requires a large attenuation. • Increase in the difference of the zeros  can move the  Cross Over point 0dB.

21. Adding The Compensator

22. Adding The Compensator • On the Cross Over point the phase margin is 5

23. Various Components Values • Degrees of freedom in choosing the component values

24. Fourth order system Canceling each other Dominant in the TF

25. Fourth order system – Bode Diagram After adding the 4th order the system is not stable – Negative phase margin Caused by adding more cross over points

26. Adding Equivalent Series Resistance The ESR of the inductors add complexity to the Transfer Function but due to their low values one can consider only the damping they apply

27. ESR Damping Effect As the ESR increases the damping decreases

28. Final Components Values

29. Final System – Step Response Settling time < 1[uS] OverShoot < 2% Working Frequency – 1[MHz] Phase Margin - 53

30. Preparing for Part B • Achieving a good understanding of the affects of each component to the system for: • Stability • Settling time • Sensitivity

31. Questions?