OCP-IP Governing Steering Committee Meeting March 04, 2010

OCP-IPGoverning Steering Committee MeetingMarch 04, 2010

08:00- 08:10 AM: Call to Order, Introductions, Agenda Review, Last Minutes,08:10- 08:30 AM: Annual Governance Resolutions and Elections08:30- 08:35 AM: Next GSC Meeting (Ian)08:35- 08:55 AM: Metadata WG Update (Prashant) 08:55- 09:25 AM: System Level Design WG Update (Mark/James) - Circuit Sutra’s workplan, schedule, status and progress - GreenSocs Protocol Checker Update - OCP 3.0 Support Update09:25- 09:35 AM: Motion to Adjourn/ Break/ Reconvene 09:35- 09:55 AM: NoC BWG Update (Erno) 09:55- 10:15 AM: FVWG Discussion (Gabriele) 10:15- 10:35 AM: Debug WG Update (Bob) 10:35- 10:55 AM: Specification WG Status (Drew) - Schedule / Participation OCP 4.0 (Drew) - Performance Measurements (Drew)10:55- 11:05 AM: Motion to Adjourn/ Break/ Reconvene 11:05- 11:20 AM: Technical Vision WG Status / Restated (Ian) - Capture GSC AIs emanating from prior days TVWG session

11:20- 11:35 AM: Progress in Asia (Ian) 11:35- 11:45 AM: 2009 Goals / Results11:45- 12:45 PM: Motion to Adjourn/ Lunch/ Reconvene12:45- 1:45 PM: AI Review (Ian) 1:45- 2:00 PM: PR Update (Joe) - 2010 PR Plan and Goals 2:00- 2:15 PM: Recruiting Update (Joe) 2:15- 2:40 PM: Budget/Cash Flow Update (Ian) - 2010 budget update - T.I. inputs to GSC (James)2:40- 2:55 PM: Motion to Adjourn/ Break/ Reconvene 2:55- 3:15 PM: Administrative Update (VitalCom) 3:15- 3:20 PM: Enabling Resolution (Ian)3:20 PM: Motion to Adjourn

Call to Order and Agenda Review (Ian) • Call to Order • Welcome from the President • Review Agenda • Any additional items?

Vote to Approve Last GSC Meeting Minutes • 32nd GSC Meeting • December 3, 2009 via teleconference

Motion: That it be resolved that all acts previously taken by any officer of the Corporation on behalf of the Corporation are approved, ratified, and confirmed, provided the acts were not inconsistent with the Corporation’s Articles of Incorporation or Bylaws, the California Corporations Code, or any other applicable law. Annual Meeting Saving Resolution / Elections (Ian) 7

Election of Officers: Chairman (existing is Ian Mackintosh) Secretary (existing is Drew Wingard) President (does not require annual ratification as President’s term is ongoing at the pleasure of the board) Confirmation of Named Directors (These proposed terms have been rolled over in this annual meeting): James Aldis for Texas Instruments (2 years) Drew Wingard for Sonics (2 years) Annual Meeting Saving Resolution / Elections (Ian) 8

34th GSC Meeting Should this be via Teleconference or at T.I.? Timing around week of June 21st? (Proposed June 24th) Start Time? Next GSC Meeting (Ian) 10

Meta Data WG Update Prashant Karandikar(Texas Instruments), March 04, 2010

2009 Goals given to MDWG by the GSC Spirit interoperability Implement OCP within existing Spirit format Spirit enhancements Propose and drive modifications into IP-XACT standard Core compatibility reports Ability to automatically compare OCP interface configurations Release IP-XACT checkers to OCP-IP community Enhance for OCP 3.0 13

People involved Nokia: Vesa Lahtinen TI: Prashant Karandikar, Anne-Francoise Joanblanq, Olivier Sagner, Bob Maaraoui, James Aldis Sonics: Kamil Synek, Pascal Chauvet, Drew Wingard Synopsys: Mark Noll STMicroelectronics: Serge Hustin, Christophe Amerijckx Magillem Design Services: Cyril Spasevski, Stephane Guntz Toshiba ( Yasuhiko Kurosawa ) OCP-IP: Ian Mackintosh Falling participation Need participants from ST , Toshiba , Nokia Michael Brouhard from Mentor Graphics agreed to participate. 14

Background OCP-IP has been talking about an IP-XACT description for several years, now we just simply need to provide it in 2008. Even if it means making some compromises. Clean and elegant solution that fits all OCP users should be the goal, but it has to be something that complies with IP-XACT 1.4 and we need to get ok from key tool providers so that their tools will be able to use the description. We should not make a monster. If somebody is only operating on small fixed OCP subsets, the full configurability of OCP should be hidden somehow. Still the description should also support the full set of configuration options. Eventually IP-XACT description should replace rtl.conf. 15

Spirit Interoperability Implement OCP within existing spirit format Use the Magillem/Sonics proposal as basis ST-style checking is used to validate an IP description Status : Vendor Extension Schema for Busdef and Abstraction Definition have been defined and available in SVN repository. OCP configuration Checker is also available in SVN repository. Both of above deliveries have been agreed within MDWG. Package released to OCP-IP GSC 16

Spirit Enhancement Propose and drive modifications into IP-XACT standard Proposal for configurable bus interfaces was not accepted for IP-XACT1.5 Spirit Consortium SWG agreed to put staging process for configurable bus interface solution , it may become part of the schema sometime later. Pascal , Stephan & Prashant talked with Dr. Gary on 28th July 17

Core Compatibility report Ability to automatically compare OCP interface configurations Check the inter-interface consistency (Current configuration compliance checks) Check consistency of a connected master / slave interface pair (Current interface interoperability checks) Check consistency of the ports and parameters Generate the rtl.conf file out of configured IP-XACT parameter list (legacy support) Configure IP-XACT parameter list based on an rtl.conf file and give rtl.conf files of OCP standard profiles as examples (legacy support) Status Feasibility of implementing interface interoperability check has been studied and agreed within MDWG First version of the interface checker have been send to MDWG. 18

OCP3.0 Add OCP 3.0 signals and parameters to bus definition schema Status OCP3.0 spec has been released recently and MDWG started study of the final version of OCP3.0 spec. 19

Release of IP-XACT checker to OCP-IP community Steps for IP-XACT checker release Package approved by MDWG Inter-interface checker would be included in next release of the checker clubbed with OCP3.0 updates. 20

08:00- 08:10 AM: Call to Order, Introductions, Agenda Review, Last Minutes,08:10- 08:30 AM: Annual Governance Resolutions and Elections08:30- 08:35 AM: Next GSC Meeting (Ian)08:35- 08:55 AM: Metadata WG Update (Prashant)08:55- 09:25 AM: System Level Design WG Update (Mark/James) - Circuit Sutra’s workplan, schedule, status and progress - GreenSocs Protocol Checker Update - OCP 3.0 Support Update09:25- 09:35 AM: Motion to Adjourn/ Break/ Reconvene 09:35- 09:55 AM: NoC BWG Update (Erno) 09:55- 10:15 AM: FVWG Discussion (Gabriele) 10:15- 10:35 AM: Debug WG Update (Bob) 10:35- 10:55 AM: Specification WG Status (Drew) - Schedule / Participation OCP 4.0 (Drew) - Performance Measurements (Drew)10:55- 11:05 AM: Motion to Adjourn/ Break/ Reconvene 11:05- 11:20 AM: Technical Vision WG Status / Restated (Ian) - Capture GSC AIs emanating from prior days TVWG session

SLD Working Group Update James Aldis (Texas Instruments), March 04, 2010

Summary • ‘EDA’ compatibility release ongoing, but effort low • Legal issue with Circuit Sutra’s OCP platform • Limited resource for OCP 3.0

OCP 3.0 • Resource in the SLD-DWG is very limited. • We expect only ‘point items’ from OCP 3.0 to be supported, as an when members of the group require them, and can afford the resource to build them • OCP 3.0 is not the only ‘todo’ - native Level adapters (TL0/TL1, TL1/TL3 etc) are also important. • It is possible that TI or Sonics may need these, and may resource their construction. • There would be at least 12 such adapters, and their testing is hard (GreenSocs has had that experience for a.n.other bus!)

EDA Tool Compatibility Release • Recap • We plan to invite the EDA members to participate in a “compatibility” release. Where we will work hard to iron out any compatibility issues with tool vendors • Our aim is: • To ensure the EDA vendors are shipping the kit, integrated with their product • To engage the EDA vendors back with the group. • +ve from Synopsys, Cadence and Mentor. But: • Need assurance they will receive positive press • Level of commitment is: testing but not fixing. • None have agreed to joining SLD meetings.

CS Legal issue • QEMU’s license situation is much worse than we had hitherto understood. • The C.S. platform is based on QEMU. • We are working on a number of fronts to try and clean things up - however, the simplest way forward is to release an “open source” limited version of the SLD kit. • James will explain the details. • A good resolution is important to maintain the participation of C.S. in the working group.

Protocol Checking • GreenSocs have used some internal technology to check (at a simple level) the functionality of the OCP kit. • But it is not a full ‘product’ and is only of help to the SLD DWG. • GreenSocs is happy to make this available to the SLD DWG. • If the technology is ever made into a product, we can revisit this.

SLD WG Status

The SLD Mid-Term Vision - unchanged • OUR KIT IS HIGH QUALITY, AND STABLE.. • Ensure that OCP users have a 'complete' modelling infrastructure available • multiple levels of abstraction (pure-functional to cycle-accurate) and use models (software development, architecture exploration, etc) • completeness means • bus interface , performance monitoring interface ,system debug interface and configuration interface • Make this modelling infrastructure standards compliant. • E.g. drive existing OCP-IP experience and expertise into OSCI-TLM • Maintain alignment between OSCI-TLM OCP-IP

Break

08:00- 08:10 AM: Call to Order, Introductions, Agenda Review, Last Minutes,08:10- 08:30 AM: Annual Governance Resolutions and Elections08:30- 08:35 AM: Next GSC Meeting (Ian)08:35- 08:55 AM: Metadata WG Update (Prashant) 08:55- 09:25 AM: System Level Design WG Update (Mark/James) - Circuit Sutra’s workplan, schedule, status and progress - GreenSocs Protocol Checker Update - OCP 3.0 Support Update09:25- 09:35 AM: Motion to Adjourn/ Break/ Reconvene09:35- 09:55 AM: NoC BWG Update (Erno) 09:55- 10:15 AM: FVWG Discussion (Gabriele) 10:15- 10:35 AM: Debug WG Update (Bob) 10:35- 10:55 AM: Specification WG Status (Drew) - Schedule / Participation OCP 4.0 (Drew) - Performance Measurements (Drew)10:55- 11:05 AM: Motion to Adjourn/ Break/ Reconvene 11:05- 11:20 AM: Technical Vision WG Status / Restated (Ian) - Capture GSC AIs emanating from prior days TVWG session

NoC Benchmarking WG Update Erno Salminen(Tampere University Technology), December 03, 2009

Recent activities: Good news • Tampere University of Technology won the OCP-IP Contributor of the Year 2009 award • for contribution to OCP-IP’sNetwork on Chip Benchmarking Working Group • Few trial installations of Transaction Generator • ”Mostly a straightforward task” • Few things to improve, e.g. remove dependencies on certain TCL libraries for XML parsing

Recent activities: Good news (2) • Modifications to TG source codes started • Mainly simplifying things • One additional research assistant is being sought currently at TUT • TG will be used in teaching during this spring • Obtain user feedback

Recent activities: Not so good news • Neutral news: TG is not yet available on OCP-IP site • We agreed with Ian that the installation and getting started should be improved before the launch • Profiling of EEMBC MultiBench has been delayed • Cut downs in personnel • Problems with limited amount of memory on FPGA platform • However, the work does continue • Member activity in general has been rather low recently

Next actions • Updates for Transaction Generator • continue aforementioned, start using TLM kit, only a couple of new properties • wide audience article (EETimes, Embedded.com etc.) planned for the spring • by TUT • Profiling of EEMBC MultiBench • by ENSTA (?), perhaps also by TUT

Next actions (2) • Recruiting new people • by all workgroup members • Traffic models for TG • by all members • TG tutorial • by TUT, hopefully contributions from other members

08:00- 08:10 AM: Call to Order, Introductions, Agenda Review, Last Minutes,08:10- 08:30 AM: Annual Governance Resolutions and Elections08:30- 08:35 AM: Next GSC Meeting (Ian)08:35- 08:55 AM: Metadata WG Update (Prashant) 08:55- 09:25 AM: System Level Design WG Update (Mark/James) - Circuit Sutra’s workplan, schedule, status and progress - GreenSocs Protocol Checker Update - OCP 3.0 Support Update09:25- 09:35 AM: Motion to Adjourn/ Break/ Reconvene 09:35- 09:55 AM: NoC BWG Update (Erno)09:55- 10:15 AM: FVWG Discussion (Gabriele) 10:15- 10:35 AM: Debug WG Update (Bob) 10:35- 10:55 AM: Specification WG Status (Drew) - Schedule / Participation OCP 4.0 (Drew) - Performance Measurements (Drew)10:55- 11:05 AM: Motion to Adjourn/ Break/ Reconvene 11:05- 11:20 AM: Technical Vision WG Status / Restated (Ian) - Capture GSC AIs emanating from prior days TVWG session

Functional Verification WG Update Gabriele Zarri(Cadence), March 04, 2010

FVWG Discussion (Gabriele) General items : • Continuing the activity started Nov 18th • Forecasted bi-weekly on Weds at 7.30am PT • Attending companies : Cadence, Synopsys, MIPS and TI • Quorum usually reached 41

FVWG Discussion (Gabriele) Technical items : • ‘Deadlock’ issue : discussion on-going. • Reached an agreement with TI, will send out proposal soon to the WG • Working on Cache-Coherence extension at different levels : configuration, signals, transfers. • Work split into two different teams (Synopsys and MIPS working at transfer level, TI and Cadence at signal/configurability level) 42

08:00- 08:10 AM: Call to Order, Introductions, Agenda Review, Last Minutes,08:10- 08:30 AM: Annual Governance Resolutions and Elections08:30- 08:35 AM: Next GSC Meeting (Ian)08:35- 08:55 AM: Metadata WG Update (Prashant) 08:55- 09:25 AM: System Level Design WG Update (Mark/James) - Circuit Sutra’s workplan, schedule, status and progress - GreenSocs Protocol Checker Update - OCP 3.0 Support Update09:25- 09:35 AM: Motion to Adjourn/ Break/ Reconvene 09:35- 09:55 AM: NoC BWG Update (Erno) 09:55- 10:15 AM: FVWG Discussion (Gabriele)10:15- 10:35 AM: Debug WG Update (Bob) 10:35- 10:55 AM: Specification WG Status (Drew) - Schedule / Participation OCP 4.0 (Drew) - Performance Measurements (Drew)10:55- 11:05 AM: Motion to Adjourn/ Break/ Reconvene 11:05- 11:20 AM: Technical Vision WG Status / Restated (Ian) - Capture GSC AIs emanating from prior days TVWG session

Debug WG Update Bob Uvacek(Samplify), March 04, 2010

OCP-IP Debug Interface Standard Group • (Ex. Toshiba, now Samplify) Bob Uvacek, chair • (Ex. MIPS/FS2, now HDL) Neal Stollon • TI Gilbert Laurenti • Toshiba CY Pei • OCP-IP contacts Ian Mackintosh, Beth Covey, Joe Basques Reviewing members • Nexus Neal Stollon • GreenSocs Mark Burton • Cadence Mike Young, Ran Avinun • MIPI Rolf Kuehnis, Gary Swoboda • Global Unichip / ITRI Alan Su, Prof. Lee, • SPIRIT Neal Stollon, Debug-WG Chair Anthony Berent, ARM • PLS / Infineon / SPRINT Jens Braunes, Albrecht Mayer • MIPS Bruce Ableidinger, • Tensilica Grant Martin 45

OCP-IP Debug Interface Standard Roadmap 3 4 5 6 7 8 9 10 11 12 Ongoing: Promote and present OCP debug slides in shows and journals Extract OCP 3.0 novelties, power and cache, into OCP 1.0 Debug Standard Physical Specification, Include waveforms for OCP signals Write Debug Chapters for new Power and Cache signals Propose processor classification and match to debug complexity levels Survey present market of OCP compliant debug IP. Who invests. Publish it inside OCP for greater review. --------------------------------------------------------- Searching for new points of engagement with industry and universities Who uses heterogeneous multi-processors? Applications? Biggest barrier to OCP debug IP dissemination is processor debug interface variability, and 6 months 2 men adaptation time. 2010 46

OCP-IP Debug Interface Standard: New Developments • We see on the market that debug hardware is being used in novel ways with highly complex chips: • - Use debug hardware for PERFORMANCE MEASUREMENT ; • without changing timing of application software: • % bus utilization; number of memory access clashes; number of powered-down blocks; • peak number of outstanding transfers; … (like task monitor in Windows but for OCP buses) • Use debug hardware to create ASSERTION TRIGGERS for events or timing measurement. • Assertions usually report errors. Assertions in debug report any basic events of interest • reusing the modern built-in infrastructure for assertions. • True debug hardware is orthogonal to chip execution and can serve as a “LOGIC ANALYSER” on chip. • Question to think about: • To promote assertions with OCP would it be good time to • standardize a few basic assertions typical for the OCP interface specially for debug • to allow debug tools and ESL tools to include displays and responses to debug assertion signals? 47

Other Debug Activities SPRINT GreenSocs IP-XACT ESL SPIRIT MC Ass. P1687 - IJTAG 1149.7 - CJTAG RTL ITRI 48

Evolution of Multi-Core Debugging and Link to OCP OCP Debug WG GOAL: Commercially available multi-core debug IP-blocks for the OCP interconnect MCDS debug IP takes 12 man months to adapt to a new processor core. Biggest obstacle is a wide variability of the debug interfaces in the processors. We plan to classify processors according to debug interface functionality: Single threaded, multi threaded, outstanding transactions, out of order, cache coherency transactions, … require different debug activities. 49

OCP-IP Governing Steering Committee Meeting March 04, 2010