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A computational paradigm for dynamic logic-gates in neuronal activity. Sander Vaus 15.10.2014. Background. “A logical calculus of the ideas immanent in nervous activity” ( Mcculloch and Pitts, 1943). Background.
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A computational paradigm for dynamic logic-gates in neuronal activity Sander Vaus 15.10.2014
Background • “A logical calculus of the ideas immanent in nervous activity” (Mcculloch and Pitts, 1943)
Background • “A logical calculus of the ideas immanent in nervous activity” (Mcculloch and Pitts, 1943) • Neumann’s generalized Boolean framework (1956)
Background • “A logical calculus of the ideas immanent in nervous activity” (Mcculloch and Pitts, 1943) • Neumann’s generalized Boolean framework (1956) • Shannon’s simplification of Boolean circuits (Shannon, 1938)
Problems • Static logic-gates (SLGs)
Problems • Static logic-gates (SLGs) • Influencial in developing artificial neural networks and machine learning
Problems • Static logic-gates (SLGs) • Influencial in developing artificial neural networks and machine learning • Limited influence on neuroscience
Problems • Static logic-gates (SLGs) • Influencial in developing artificial neural networks and machine learning • Limited influence on neuroscience • Alternative: • Dynamic logic-gates (DLGs)
Problems • Static logic-gates (SLGs) • Influencial in developing artificial neural networks and machine learning • Limited influence on neuroscience • Alternative: • Dynamic logic-gates (DLGs) • Functionality depends on history of their activity, the stimulation frequencies and the activity of their interconnetcions
Problems • Static logic-gates (SLGs) • Influencial in developing artificial neural networks and machine learning • Limited influence on neuroscience • Alternative: • Dynamic logic-gates (DLGs) • Functionality depends on history of their activity, the stimulation frequencies and the activity of their interconnetcions • Will require new systematic methods and practical tools beyond the methods of traditional Boolean algebra
Elastic response latency • Neuronal response latency • The time-lag between a stimulation and its corresponding evoked spike
Elastic response latency • Neuronal response latency • The time-lag between a stimulation and its corresponding evoked spike • Typically in the order of several milliseconds
Elastic response latency • Neuronal response latency • The time-lag between a stimulation and its corresponding evoked spike • Typically in the order of several milliseconds • Repeated stimulations cause the delay to stretch
Elastic response latency • Neuronal response latency • The time-lag between a stimulation and its corresponding evoked spike • Typically in the order of several milliseconds • Repeated stimulations cause the delay to stretch • Three distinct states/trends
Elastic response latency • Neuronal response latency • The time-lag between a stimulation and its corresponding evoked spike • Typically in the order of several milliseconds • Repeated stimulations cause the delay to stretch • Three distinct states/trends • The higher the stimulation rate, the higher the increase of latency
Elastic response latency • Neuronal response latency • The time-lag between a stimulation and its corresponding evoked spike • Typically in the order of several milliseconds • Repeated stimulations cause the delay to stretch • Three distinct states/trends • The higher the stimulation rate, the higher the increase of latency • In neuronal chains, the increase of latency is cumulative
Δ (Vardi et al., 2013b)
Experimentally examined DLGs • Dyanamic AND-gate
Experimentally examined DLGs • Dyanamic AND-gate • Dynamic OR-gate
Experimentally examined DLGs • Dyanamic AND-gate • Dynamic OR-gate • Dynamic NOT-gate
Experimentally examined DLGs • Dyanamic AND-gate • Dynamic OR-gate • Dynamic NOT-gate • Dynamic XOR-gate
Theoretical analysis • A simplified theoretical framework
Theoretical analysis • A simplified theoretical framework l(q) = l0 + qΔ(1) l0– neuron’s initial response latency q – number of evoked spikes Δ – constant (typically in range of 2-7 μs
Theoretical analysis • A simplified theoretical framework l(q) = l0 + qΔ (1) τ(q) = τ0 + nqΔ(2) τ0 – initial time delay of the chain n –number of neurons in the chain
Theoretical analysis • A simplified theoretical framework l(q) = l0 + qΔ (1) τ(q) = τ0 + nqΔ(2) Simplifying assumption: The number of evoked spikes of a neuron is equal to the number of its stimulations
Theoretical analysis • Dynamic AND-gate
Theoretical analysis • Dynamic AND-gate • Generalized AND-gate
Theoretical analysis • Dynamic AND-gate • Generalized AND-gate • number of intersections of k non-parallel lines: 0.5k(k – 1)
Theoretical analysis • Dynamic AND-gate • Generalized AND-gate • number of intersections of k non-parallel lines: 0.5k(k – 1) • Dynamic XOR-gate
Theoretical analysis • Dynamic AND-gate • Generalized AND-gate • number of intersections of k non-parallel lines: 0.5k(k – 1) • Dynamic XOR-gate • Transitions among multiple modes
Theoretical analysis • Dynamic AND-gate • Generalized AND-gate • number of intersections of k non-parallel lines: 0.5k(k – 1) • Dynamic XOR-gate • Transitions among multiple modes • Varying inputs
Multiple component networks and signal processing Basic edge detector: (Vardi et al., 2013b)
Suitability of DLGs to brain functionality • Short synaptic delays
Suitability of DLGs to brain functionality • Short synaptic delays • The examined cases set the synaptic delays to a few tens of milliseconds, as opposed to those of several milliseconds in the brain
Suitability of DLGs to brain functionality • Short synaptic delays • The examined cases set the synaptic delays to a few tens of milliseconds, as opposed to those of several milliseconds in the brain • Can be remedied with the help of long synfire chains
Suitability of DLGs to brain functionality • Short synaptic delays • The examined cases set the synaptic delays to a few tens of milliseconds, as opposed to those of several milliseconds in the brain • Can be remedied with the help of long synfire chains • Population dynamics • DLGs assume