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Sequential Circuits. Chapter 5. SR latch with NOR gates. latch with NAND gates. SR latch with control input. D latch. Flip-flops. SR master-slave flip-flop. Negative-edge-triggered D flip-flop. Positive-edge-triggered D flip-flop. Characteristic tables. SR flip-flop. D flip-flop.
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Sequential Circuits Chapter 5
Flip-flops SR master-slave flip-flop
Characteristic tables • SR flip-flop • D flip-flop Can’t do “No Change”
State diagram Mealy model Moore model
A: 00 B: 01 C: 11 D: 10
Sequential circuit design 1/0 0/0 A B C D 1/0 0/0 1/0 0/0 1/1 0/0 Eg. 序列中若出現“1101”就輸出“1” (如1010011100100101101101)