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Locally decodable codes with 2 queries and polynomial identity testing for depth 3 circuits. Zeev Dvir Weizmann Institute of Science Amir Shpilka Technion. This talk. Explaining the title: Locally Decodable codes Polynomial identity testing depth 3 circuits Results:
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Locally decodable codes with 2 queriesandpolynomial identity testing for depth 3 circuits Zeev Dvir Weizmann Institute of Science Amir Shpilka Technion
This talk • Explaining the title: • Locally Decodable codes • Polynomial identity testing • depth 3 circuits • Results: • Improved bounds for 2-queries LDC's • Getting 2-LDC's from identically zero depth 3 circuits. • Structural theorem for identically zero depth 3 circuits • PIT for depth 3 circuits
w.h.p Algorithm Locally decodable codes Def: E: Fn!Fm is q-LDC if xk can be recovered from q entries of E(x). Even if E(x) is corrupted in m coordinates. With high probability. k xk
Main questions: constructing LDC's, proving lower bounds on their length. • Known constructions: q-LDC E: Fn!Fm with m = exp(nloglog(q)/q¢log(q)) [BIKR02]. • Lower bounds: • [KT00]: m = (n1 + 1/q-1) • [GKST01]: In linear 2-LDC over Fm = exp((n)- log|F|) • [KdW03]: In 2-LDC over {0,1} m = exp((n)). • Our result: In linear 2-LDC m = exp((n)). Works for every field size, i.e. F=R.
f(x1,...,xn) Polynomial identity testing ? 0 Assumption: f has succinct representation. Motivation: Natural problem, many applications: primality testing, finding matching ... Schwartz-Zippel: Evaluate f(x) at a random point. Long Term Goals: Deterministic algorithm. Short Term Goals: Restricted Models.
General circuits: Randomized algorithms [S80],[Z79],[CK97],[LV98],[AB03]: • poly(1/,size) time, n¢log(d/) random bits • Hardness vs. Randomness trade-off: [KI03] • PIT 2 P ) arithmetic lower bound for NEXP • NEXP * P/poly or • PERM arithmetic P/poly • Lower bounds for arithmetic circuits imply sub-exponential time deterministic algs. • look for PIT where l.b. are known!
Non-commutative formulas: (vars do not commute) • [N91] exponential lower bound on formula size • [RS04] PIT determ. poly-time in size of formula • “Depth 2” circuits: (sparse polynomials) • [BoT88],[GKS90],...,[KS01]: deterministic poly time. • No sub-exp time deterministic algs. for depth > 2 • Open [KS01]: depth 3 circuits w. top fan-in = 3. • This paper: depth 3 circuits with small top fan-in:deterministic: quasi-polynomial time PIT alg. • (poly time for multilinear circuits).randomized: polynomial time polylog random bits. • New result: [KS06] polynomial time algorithm.
+ + + + M1 Mk L1,1 X X X X L1,d1 Depth 3 circuits - (k) circuits top fan-in ck c1 a1 an a0 Li,j = t=1...n at¢xt + a0 Mi = j=1...diLi,j ... x1 xn 1 C(x) = i=1...k ci¢Mi = ici¢jLi,j
What's next: • Sketch of lower bound for 2-LDC. • PIT for depth 3 circuits with top fan-in = 2. • PIT for depth 3 circuits with top fan-in = 3. • General depth 3 circuits (sketch) • Structural theorem for identically zero depth 3 circuits. • PIT algorithms for depth 3 circuits
Thm 1 [GKST01]: For any linear 2-LDC over {0,1} of length m, m = exp((n)). • Proof:Isoperimetric inequality. • Thm 2 [GKST01]: For any linear 2-LDC over F of length m, m = exp((n) – log|F|). • Proof: combine next lemma with theorem 1. • Lemma [GKST01]: If 9 linear 2-LDC over F of length m then 9 linear 2-LDC over {0,1} of length |F|¢ m. • Proof: randomly map all multiples of all coordinates to {0,1}. • New Lemma: If 9 linear 2-LDC over F of length m then 9 linear 2-LDC over {0,1} of length m. • Proof: randomly map well chosen multiple of each coordinate to {0,1}.
What's next: • Sketch of lower bound for 2-LDC. • PIT for depth 3 circuits with top fan-in = 2. • PIT for depth 3 circuits with top fan-in = 3. • General depth 3 circuits (sketch) • Structural theorem for identically zero depth 3 circuits. • PIT algorithms for depth 3 circuits
Identically zero (2) circuits • Reminder: C(x) = c1¢M1 + c2¢M2 M1(x)= M2(x)= Fact: linear functions are irreducible polynomial. Corollary: C0 then M1, M2 have the same factors. Corollary: 9 matching i j(i) s.t. Li ~ L'j(i) PIT algorithm: look for such a matching.
What's next: • Sketch of lower bound for 2-LDC. • PIT for depth 3 circuits with top fan-in = 2. • PIT for depth 3 circuits with top fan-in = 3. • General depth 3 circuits (sketch) • Structural theorem for identically zero depth 3 circuits. • PIT algorithms for depth 3 circuits
Preliminaries • Claim: wlog linear functions are homogeneous (no constant term). • Claim: A:FnFn invertible linear map, then C(x)0 , C(A¢x)0. • Definition:r, rank(C) , rank(linear functions in C). • Corollary 1: wlog Li's depend only on x1,...,xr. • Corollary 2: wlog x1,...,xr appear as linear functions in C.
0 • Input: C(x) = c1¢M1 + c2¢M2 + c3¢M3 • x1,...,xr are linear functions in C • wlog assume g.c.d.(M1,M2,M3) = 1 M1(x)= M2(x)= 0 M3(x)= • Idea: reduction to (2): C0 ) C|xs=0 0 • ) if xs2M1 then c2¢M2|xs=0+c3¢M3|xs=0=0. • Lemma: 8xs9d pairs (i,j(i)) s.t. Li|xs=0 ~ Lj(i)|xs=0
Input: C(x) = c1¢M1 + c2¢M2 + c3¢M3 • M1 = i=1...dLi(x), M2=i=1...dLd+i(x), M3=i=1...dL2d+i(x) • x1,...,xr are linear functions in C • Lemma: 8xs9d pairs (i,j(i)) s.t. Li|xs=0 ~ Lj(i)|xs=0 • Lemma: i=1,2 Li2Mi: L1|xs=0 ~ L2|xs=0) xs2 span(L1,L2) • Proof: Otherwise L1~ L2) L1 | M1,M2) if C0 then L1 | M3) L12 g.c.d(M1,M2,M3) ? • Define E(x) = L1(x),...,L3d(x) • Claim: 8s 9d pairs (i,j(i)) s.t. xs2 span(E(x)i,E(x)j(i)). • Corollary: E is a 2-LDC of length 3d. • Corollary: 3d=exp((r)) ) r=O(log(d)). • Thm: If C0 is (3) then rank(C) = O(log(d)). • PIT Algorithm: brute force. time = exp(log(d)2).
What's next: • Sketch of lower bound for 2-LDC. • PIT for depth 3 circuits with top fan-in = 2. • PIT for depth 3 circuits with top fan-in = 3. • General depth 3 circuits (sketch) • Structural theorem for identically zero depth 3 circuits. • PIT algorithms for depth 3 circuits
Input: C(x) = c1¢M1 + c2¢M2 + c3¢M3 + ... + ck¢Mk • Def: C is simple if g.c.d.(M1,...,Mk)=1 • Def: sim(C) = C/g.c.d.(C) • Def: C is minimal if no sub-circuit is zero. • Thm: C0 is simple and minimal, r = rank(C), d = deg(C). Then 9 2-LDC E: FaFb s.t. a = r/2k2log(d)k-3 b = kd • Corollary: rank(C) · O(log(d)k-2) • Proof: induction on k. Assume x1,...,xr2 C. Consider C|xi = 0 0. Top fan-in is k-1. Done? • simple? minimal? rank?
Claim: 8xs9Is s.t. (CIs)|xs=0 0 and minimal 0 M1(x)= M2(x)= Is M3(x)= ... Mk(x)= Cor: 9I,r' ¸ r/2k s.t. (wlog) 8 1· s · r' (CI)|xs=0 0 and minimal.
Cor: 9I,r' ¸ r/2k s.t. 8 1 · s · r' (CI)|xs=0 0 and minimal. • Optimistic: done? • Problematic: what's the rank of (CI)|xs=0 ? • Optimistic: lemma: rank(CI) ¸ r' ¸ r/2k • Problematic: (CI)|xs=0 not simple • Optimistic: consider sim((CI)|xs=0 ) (removing g.c.d.) • Problematic: what happens to the rank? • Optimistic: eh ... • Lemma: 9 xi s.t. • rank(sim((CI)|xs=0)) ¸ rank(CI)/2klog(d) • Proof: … • End of proof: induction on (CI)|xi=0 (from Lemma).
What's next: • Sketch of lower bound for 2-LDC. • PIT for depth 3 circuits with top fan-in = 2. • PIT for depth 3 circuits with top fan-in = 3. • General depth 3 circuits (sketch) • Structural theorem for identically zero depth 3 circuits. • PIT algorithms for depth 3 circuits
Structural theorem: C 0 is (k) then: • 9 partition I1t I2t ... t Im = [k] s.t. • CIj 0 minimal (C = CI1 + CI2 + ... + CIm) • rank(sim(CIj)) · O(log(d)|Ij|-2) • PIT algorithm: For each I ½ [k] check whether rank(sim(CI)) · O(log(d)|I|-2) • if yes then brute force check if CI 0 • if 9 partition as in theorem then C 0 • Running time: exp(log(d)k-1).
The Multilinear Case • If C is multilinear then rank(C)=d. • But we proved that if C=0 is simple and minimal then rank(C) · polylog(d) • We get that d · polylog(d) • Can only hold for finitely many values ! • Conclusion: d · O(1) • rank(C) · dk · O(1) • Polynomial time algorithm
Open problems (Multilinear) • PIT algorithms for stronger models: • Depth 3 circuits • Bounded depth • Tightness of our results: • Conjecture: If C 0 is (k) simple, minimal then rank(C) = poly(k). • [KS06] Not true for finite fields! Example in of a circuit with top fanin=3 and rank ~ log(d) (Multilinear)