Embedded DSP Spectrum Analyzer

1. Embedded DSP Spectrum Analyzer Team Number: Date: Client: Advisors: Team Members: May 0104 April 25, 2001 Teradyne Corp Julie DickersonBill Black Prihamdhani Amran EERyan Butler CprEAaron Delaney EENicky Hilton CprE

2. Presentation Outline Introduction Problem Statement Design Objectives End Product Description Assumptions & Limitations Risks and Concerns Technical Approach Project Success Future Work Human and Financial Budgets Lessons Learned Summary

3. Introduction Teradyne – very high end test equipment Several Teradyne sponsored groups Group 1 – PC spectrum analyzer Group 2 – Embedded DSP spectrum analyzer Group 3 – Single board DSP spectrum analyzer Group 4 – Replicating analyzers on single board Purpose of projects – Replace ‘serial’ method of testing with faster ‘parallel’ approach

4. Key Concepts Dynamic range Ratio of signal levels expressed in dB DSP - Digital signal processing Fourier Transform–Translates signal from time domain to frequency domain Notch filter - Rejects signals within a narrow band of frequencies and passes all other signals Anti-aliasing filter A low-pass filter to prevent aliasing

5. What is Aliasing? Aliasing is the generation of a false (alias) frequency along with the correct one when doing frequency sampling.

6. Dynamic Range CD player: 96 dB Tester must have dynamic range that is a factor of 10 better Ratio V(tester) to V(cd player) = 10 20 * log(10) = 20 dB Our tester – another factor of 10!!! 96 dB + 20 dB + 20 dB = 136 dB

7. Fourier Transform Signal broken into frequency components More than one signal present Frequency domain Time domain

8. Problem Statement Evaluate analog input signal between DC and 1MHz (bandwidth) Process signal on external hardware Display signal properties on PC

9. Design Objectives Dynamic range Total dynamic range -135dB Digitizer -96 dB Filters approx. -40/50 dB Signal properties Measure five harmonics Measure THD, SNR, Noise floor Measure amplitude of fundamental & harmonic frequencies Measure input frequencies from DC to 1MHz Intended users and uses Future Teradyne senior design teams

10. End Product Description External hardware System components Signal generator Filter board A/D converter Digital signal processor Host computer PC software GUI interface DSP program

11. Assumptions Hardware selection Finding A/D and DSP would be easy Hardware integration Interfacing A/D and DSP would be difficult Software package Development tools for DSP available Filter design High quality parts for filters available Financial Budget Teradyne will cover all costs

12. Limitations Technical knowledge Analog filter design Limited experience with DSP Hardware selection Reading data sheets Available digitizer/DSP boards Software No experience writing in Lab View

13. Project Risks and Concerns Hardware selection Delay part orders Delay system integration Delay software development Integrating hardware Frying expensive equipment

14. Technical Approach Required specifications External hardware approach Twin-T notch filters Analog Devices products Design choices • Hardware • Custom/commercial board design • Anti-aliasing filters • Software • LabView/C/C++/Java • E.A.G.L.E software • OrCAD p-spice

15. Technical Approach

16. Step 1 – Filtering frequency by 40-50 dB Filter board 4 filters laid out on custom board • Anti-aliasing • Makes sure no signals over • 1 MHz enter the system • Notch filters • Knocks down fundamental

17. Notch Filter Noise floor Noise floor After notch filter Before notch filter

18. Step 2 – A/D Conversion Analog Devices 976A 16 bit Signal from filter is digitized Data passed to DSP A/D channel determines which filter will be used.

19. Step 3 – Signal Processing Analog Devices DSP 40 MHz Store digitized signal in DSP memory Perform Fast Fourier Transform Calculate signal properties of interest

20. Step 4 – Calibration Reduces total system error Determines notch frequency of each filter Calibration steps Generate white noise Perform FFT Find notch Generate signal at notch frequency

21. Notch Filter Calibration White noise FFT of noise

22. Step 5 – Display Data DSP data sent to PC Lists all signal properties of interest

23. Evaluation of Project Success Completed tasks Filter design Filter board design Filter board fabrication GUI code written DSP code written Tasks not completed Hardware integration DSP and host PC communication code

24. Future Work Hardware Redesign to meet frequency specification Single board solution Filtering More filters added Prefabricated filter banks Software Rewrite DSP code for single board solution Optimize algorithms for real time processing Add functionality to software

25. Financial Budget

26. Human Budget

27. Lessons Learned Keep ahead of deadlines Make backup plans Ordering/Receiving parts Software problems More documentation Keep better lab notes Documentation for next team

28. Closing Summary Learned a lot about DSP and analog filter design Team skills improved Useful information passed to next group Acknowledgements Teradyne Julie Dickerson & Bill Black Brian Nowak & Neeraj Nayak

29. Questions