Instructor: Nachiket M. Kharalkar Lecture 10 Date: 06/22/2007 E-mail: knachike@ece.utexas.edu

1. Introduction to Microcontrollers Instructor: Nachiket M. Kharalkar Lecture 10 Date: 06/22/2007 E-mail: knachike@ece.utexas.edu

2. Today’s Agenda • Exam 1 = June 25th • Review Exam 1 • Finite state machine • Lab 3: Traffic light controller Nachiket M. Kharalkar

3. Definitions volatile, nonvolatile, RAM, ROM, port basis, nibble, precision, decimal digits (see table in next slide) overflow, ceiling and floor, drop out, bus, address bus, data bus, memory-mapped, I/O mapped bus cycle, read cycle, write cycle, IR, EAR, BIU, CU, ALU, registers, reset vector Nachiket M. Kharalkar

4. Nachiket M. Kharalkar

5. Few basic things to memorize • 22 = 4 • 23 = 8 • 24 = 16 • 25 = 32 • 26 = 64 • 27 = 128 • 28 = 256 • 29 = 512 • 210 = 1024 ≈ 103 • 211 = 2048 • 212 = 4096 • 213 = 8192 • 214 = 16384 • 215 = 32768 • 216 = 65536 • 162 = 256 • 163 = 4096 • 164 = 65536 Nachiket M. Kharalkar

6. Number conversions, 8-bit (fill in the blank) • convert one format to another without a calculator signed decimal e.g., -56 unsigned decimal e.g., 200 binary e.g., %11001000 hexadecimal e.g., $C8 • I won’t ask you to convert signed binary or signed hex: signed binary e.g., -%00101111 signed hexadecimal e.g., -$2F Nachiket M. Kharalkar

7. Details of executing single instructions • 8-bit addition, subtraction yielding result, N, Z, V, C (like HW1) • simplified cycle by cycle execution • assembly listing to execution cycles (Lab 2) for example for indexed mode addresses, ldaa 4,x ldaa 40,x ldaa -4,x ldaa -40,x ldaa $400,x ldaa 4,+x ldaa 4,-x ldaa 4,x+ ldaa 4,x- • calculate effective address • go from assembly to machine code xb • go from machine code xb to assembly • simple multiply and divide (mul idiv fdiv) Nachiket M. Kharalkar

8. Simple programs (look at assembly code in Chap 1,2,3) • set reset vector • specify an I/O pin is an input • specify an I/O pin is an output • clear an I/O output pin to zero • set an I/O output pin to one • toggle an I/O output pin • check if an I/O input pin is high or low • e.g., if PA4 is low then make PB2 high • 8-bit operations • add, sub, shift left, shift right, and, or, exor • simple if-then like examples in Chapter 3 • simple while-loop like examples in Chapter 3 Nachiket M. Kharalkar

9. it is important to know • precision (e.g., 8-bit, 16-bit) • format (e.g., unsigned, signed) • unsigned, bhi blo bhs and bls • signed, bgt blt bge and ble • It takes three steps • read the first value into a register • compare the first value with the second value • conditional branch Nachiket M. Kharalkar

10. 16-bit timer 6812 timer ports. Nachiket M. Kharalkar

11. PR2 PR1 and PR0 define the TCNT clock period Nachiket M. Kharalkar

12. Fixed time delay software using the built-in timer ****Timer_Init********** * Initialize Timer * Input: none * Outputs: none * error: none Timer_Init movb #$80,TSCR1 ;enable TCNT movb #$00,TSCR2 ;divide by 1 rts ****Timer_Wait********** * Time delay function * Input: RegD time to wait (125ns cycles) * Outputs: none * error: input must be less than 32767 Timer_Wait adddTCNT TCNT at end of delay WloopcpdTCNT is EndT<TCNT bplWloop rts Nachiket M. Kharalkar

13. Example assume TCNT = 31 (can be any value), Reg D = 4000 (means 1ms, in 250-ns units) the addd will make RegD = 4031 (remains fixed for the rest of the subroutine) Run square.rtf, with a ScanPoint on Wloop RegD-TCNT CCR=sXhInzvc RegD=4031 TCNT=34 3997 CCR=sXhInzvc RegD=4031 TCNT=40 3991 CCR=sXhInzvc RegD=4031 TCNT=46 3985 CCR=sXhInzvc RegD=4031 TCNT=52 3979 … CCR=sXhInzvc RegD=4031 TCNT=4000 31 CCR=sXhInzvc RegD=4031 TCNT=4006 25 CCR=sXhInzvc RegD=4031 TCNT=4012 19 CCR=sXhInzvc RegD=4031 TCNT=4018 13 CCR=sXhInzvc RegD=4031 TCNT=4024 7 CCR=sXhInzvc RegD=4031 TCNT=4030 1 CCR=sXhINzvC RegD=4031 TCNT=4036 -5 Nachiket M. Kharalkar

14. ;************ Timer_Wait10ms*************** ; time delay ; inputs: RegY is the number of 10ms to wait ; outputs: none ; errors: RegY=0 will wait 655.36 sec ; CYCLES10MS = 315 ;Run mode in real 9S12C32 10000us/32us, if TCNT=32us Timer_Wait10ms ldd #CYCLES10MS bsr Timer_Wait dbne Y,Timer_Wait10ms rts Nachiket M. Kharalkar

15. New topics from this slide(not for exam 1) Nachiket M. Kharalkar

16. Board Demo http://www.ece.utexas.edu/~valvano/S12C32.htm For more information on using the board to develop assembly programs seehttp://www.ece.utexas.edu/~valvano/EE319K/CW12asm.pdf Nachiket M. Kharalkar

17. Abstraction • Software abstraction • define a problem with a set of basic abstract principles • separate policies mechanisms • The three advantages of this abstraction are 1) it can be faster to develop 2) it is easier to debug (prove correct) and 3) it is easier to change Nachiket M. Kharalkar

18. Finite State Machine (FSM) • A finite state machine (FSM) or finite automaton is a model of behavior composed of states, transitions and actions. • inputs, outputs, states, and state transitions • state graph defines relationships of inputs and outputs • There are two types of FSM’s • Acceptors/Recognizers and • Transducers Nachiket M. Kharalkar

19. Acceptor FSM • This kind of machine gives a binary output, saying either yes or no to answer whether the input is accepted by the machine or not. • All states of the FSM are said to be either accepting or not accepting. Nachiket M. Kharalkar http://en.wikipedia.org

20. Transducer FSM • Transducers generate output based on a given input and/or a state using actions. • They are used for control applications. • It can be further classified into following two types • Moore FSM and • Mealy FSM Nachiket M. Kharalkar

21. Moore FSM • Output value depends only on the current state, and inputs affect the state transitions • Significance is being in a state • input: when to change state • output: how to be in that state • The advantage of the Moore model is a simplification of the behavior. Nachiket M. Kharalkar

22. Moore FSM Nachiket M. Kharalkar

23. Mealy FSM • Output depends both on the current state and the inputs. • inputs affect the state transitions. • significance is the state transition • input: when to change state • output: how to change state • The use of a Mealy FSM leads often to a reduction of the number of states. Nachiket M. Kharalkar

24. Mealy FSM Nachiket M. Kharalkar

25. data structure embodies the FSM • multiple identically-structured nodes • statically-allocated fixed-size linked structures • one-to-one mapping FSM state graph and linked structure • one structure for each state • linked structure • pointer (or link) to other nodes (define next states) • table structure • indices to other nodes (define next states) Nachiket M. Kharalkar

26. A simulated traffic intersection interfaced to MC68HC11 Nachiket M. Kharalkar

27. Traffic light controller using the Moore FSM Nachiket M. Kharalkar

28. org $3800 variables go in RAM StatePt rmb 2 Pointer to the current state org $4000 Put in ROM Out equ 0 offset for output value * 2 bit pattern stored in the low part of an 8 bit byte Wait equ 1 offset for time to wait Next equ 2 offset for 4 next states * Four 16 bit unsigned absolute addresses Nachiket M. Kharalkar

29. org $3800 variables go in RAM StatePtrmb 2 Pointer to the current state org $4000 Put in ROM Out equ 0 offset for output value * 2 bit pattern stored in the low part of an 8 bit byte Wait equ 1 offset for time to wait Next equ 2 offset for 4 next states InitStatefdb S1 Initial state S1 fcb %01 Output fcb 5 Wait Time fdb S2,S1,S2,S3 S2 fcb %10 Output fcb 10 Wait Time fdb S3,S1,S2,S3 S3 fcb %11 Output fcb 20 Wait Time fdb S1,S1,S2,S1 org $5000 programs go in ROM Main lds #$4000 * initializations ldxInitState State pointer stxStatePt * Purpose: run the FSM * 1. Perform output for the current state * 2. Wait for specified amout of time * 3. Input from the switches * 4. Go to the next state depending on the input * StatePt is the current state pointer FSM ldxStatePt 1. Do output ldabOut,x Output value for this state in bits 1,0 stab PTT ldaaWait,x 2. Wait in this state bsr WAIT ldab PTM 3. Read input andb #$03 just interested in bits 1,0 lslb 2 bytes per 16 bit address abx add 0,2,4,6 depending on input ldxNext,x 4. Next state depending on input stxStatePt bra FSM Nachiket M. Kharalkar

30. To add more complexity (e.g., put a red/red state after each yellow state), we simply increase the size of the fsm[] structure define the Out, Time, and Next pointers To add more output signals (e.g., walk light), use more of Out field. could increase the precision of the Out field To add two input lines (e.g., walk button), increase the size of Next[8]. size = 2**(number of inputs) Nachiket M. Kharalkar

31. Lab 3: Traffic Light controller Nachiket M. Kharalkar

32. /* Port C bits 1,0 are sensor inputs, Port B bits 5-0 are LED outputs */ const struct State { unsigned char Out; //Output to Port B unsigned short Time; //sec to wait const struct State *Next[4];}; // Next if input=00,01,10,11*/ typedef const struct State StateType; #define goN &fsm[0] #define waitN &fsm[1] #define goE &fsm[2] #define waitE &fsm[3] StateType fsm[4]={ {0x21,30,{goN,waitN,goN,waitN}}, // goN {0x22, 5,{goE,goE,goE,goE}}, // waitN {0x0C,30,{goE,goE,waitE,waitE}}, // goE {0x14, 5,{goN,goN,goN,goN}}}; // waitE StateType *Pt; // Current State void main(void){ unsigned char Input; DDRB = 0xFF; // outputs to traffic light DDRC = 0xFC; // PC1 car on north Pt = goN; // PC0 car on east while(1){ PORTB = Pt->Out; // Perform output Wait1sec(Pt->Time); // Time to wait Input = PORTC&0x03; // 00,01,10,11 Pt = Pt->Next[Input]; // next } } Nachiket M. Kharalkar