Simulators in the Affirma Analog Design Environment

1. Simulators in the Affirma Analog Design Environment Sachin Shinde Xiaolai He

2. Cadence design framework II environment consists of many Cadence tools which are interoperable without requiring data conversion. • DFII is an open system allowing the user to integrate third party tools like simulators using programmable netlister or enter their own design data. Simulators Socket Simulators Eg. SpectreS, cdsSpice Direct Simulators Eg. Spectre

3. Direct Simulation Vs Socket Simulation • Direct Simulation • This is a preferred method because uses the new features added to Spectre simulator and uses direct simulation. • With direct simulation, the netlist uses the syntax of the simulator w/o any processing to evaluate expressions. • The netlist is a direct reflection of the design. • Socket Simulation • The netlist is processed by Cadence SPICE to evaluate all expressions and resolve passed parameters. • Socket methodology is used to integrate a simulator if the current simulator cannot handle expressions or parameters passing. • Efficient operation in various interactive mode such as simulation stop and restart or change values and resimulate.

4. More About Direct Simulation • Important Benefits of Direct Simulation • Improved performance in netlisting. • Improved performance of simulation for Spectre. • Readable netlists. • Read only design can be simulated provided that they are extracted. • Improved support of standalone netlisting.

5. Other Simulators • In addition to Cadence SPICE and Spectre circuit simulator popular analog and microwave simulators can be used through a set of integrated simulation interfaces. • Eg. Meta Software’s HSPICE circuit simulator, HP’s MNS microwave simulator, Compact Software’s Harmonica microwave simulator. • We have AFFIRMA HSPICE interface installed on our system. • We do not have a HSPICE simulator installed yet.

6. Spice, PSpice and HSpice • SPICE was originally developed at the Electronics Research Laboratory of the University of California, Berkeley (1975) • PSpice is a PC version of SPICE (MicroSim Corp.) • HSpice is a version (Avant!.) that runs on UNIX workstations and larger computers. This is particularly fast version and one that should be normally used.

7. Spectre Simulator • AFFIRMA Spectre simulates analog and digital circuits at the differential equation level. • The capabilities of Spectre circuit simulator are similar in function and application to SPICE, but Spectre is not descended from SPICE. • Spectre and SPICE use the same basic algorithms eg. Newton Raphson, direct matrix solution, but every algorithm is newly implemented. • Manual claims Spectre algorithms are the best currently available and is faster, accurate, more reliable and more flexible than previous SPICE like simulators.

8. Improvements of Spectre over SPICE • Improved Capacity • Can simulate larger circuit. • Improved Accuracy • Improved component models and core simulator algorithms • Improved Speed • Improved Reliability • Improved Models • Analog HDLS • Works with Spectre HDL and Verilog- A • RF Capabilities • Analyses of Mixer, oscillators, sample hold and switched-capacitor filter • Mixed Signal Simulation • Spectre circuit simulator coupled with the Verilog-XL simulator in the AFFIRMA environment can simulate mixed analog and digital circuit • Environment • Fully integrated into Cadence DFII for AFFIRMA and also in Cadence Analog workbench design system

9. SPICE compatibility of Spectre • SPICE is a industry standard language with many variations of SPICE syntax on market today. • Each vendor modifies it with different capabilities and/or slightly different syntax. • For convince of SPICE users AFFIRMA Spectre simulator provides SPICE Reader as an extension to its native language that accepts most variations of SPICE input. • SPICE Reader supports SPICE2, SPICE3, and common extensions found in other simulators like PSPICE and HSPICE.

10. Cadence SPICE • Cadence SPICE simulator is an interactive circuit simulator based on UC Berkley’s SPICE2 program. • Modified architecture for interactive operations plus enhancement that automatically improve convergence with problem circuit. • Can be used within the Analog simulation environment or as a standalone simulator.

11. Cadence DFII Architecture

12. HSPICE Simulator • Gold standard for accurate circuit simulation. • Extensive set of build in devices, models including models for small geometry MOSFET and MESFET. • Compatible with Spice and MSING input format. • Cadence supports a library of primitives and a full interface of HSpice. • High Performance: • HSPICE achieves upto 20x speed up for cell characterization applications where speed, power and noise are most important. • HSPICE RF For High Frequency & RF Designs: • Using its harmonic balance engine, HSPICE RF offers high-capacity non-linear, frequency domain simulation capabilities for RFIC and high frequency designs. • Signal Integrity: • HSPICE simulates enhanced W – elements and extracted S – parameters for accurate signal integrity analysis of PCB’s.

13. Inverter Example • Compared performance of Spectre, SpectreS, cdsSpice and HSPICE simulators using the inverter example.

14. AMI06N Models in Spectre and Hspice Spectre (AMI06N) Hspice (AMI06N)

15. Simulation with Spectre • Used the Spectre MOS models for simulation in the standalone mode. • Total time required for the 24ns simulation with step size of 0.01n was 1s.

16. Simulation with SpectreS • Used the spectre MOS models for simulation in the nominal mode. • Does not simulate using the hspice models. • Total time required for the 24ns simulation with step size of 0.01n was 3s.

17. Simulation with cdsSpice • Can be simulated using either the Hspice or Spectre models for simulation in the nominal mode. • Total time required for the 24ns simulation with step size of 0.01n was 21s.

18. Simulation with HSPICE • Using the AFFIRMA hspice interface could generate the netlist fro HSPICE. • Couldn not simulate it cause do not HSPICE simulator is not installed.

19. NCSU’s Spectre and Hspice Comparison • The process: TSMC 0.25um • The models: BSIM3v3, size-binned • The circuit: A 25-element delay chain using current-steering inverters • The measurement: Rising edge delay (50%) between clock input and final delay element output for different control voltages • Worst-case percent difference is 3.32%. Worst-case absolute difference (Spectre - HSPICE) is 109ps

20. Conclusion • Many variations of SPICE simulators are available in the market each optimized for different function. • The choice of a type of SPICE simulator is very problem dependent. • Spectre available in AFFIRMA is not a SPICE simulator. • Spectre is well documented. • Cadence SPICE is the SPICE simulator available in AFFIRMA which can be used with cdsSPICE or SpectreS interface. • In the inverter simulation we found spectre simulator to be much faster than SpectreS and cdsSpice.

21. Conclusion (cont.) • Couldn't compare the speed of simulation for Spectra and Hspice simulators. • NCSU tutorial states that they didn’t find and significant difference between HSPICE and Spectre simulations results. • In general we would recommend the use of Spectra over SpectreS and cdsSpice if the development environment is Cadence. • If portability of design across different environment is desired a Spice based simulator like Hspice or cdsSpice is recommended.

22. References • Affirma Analog Circuit Design Environment User Guide, Cadence, Product version 4.4.6, April 2001 • Cadence Spice Reference Manual • AFFIRMA Spectre simulator users guide • http://www.synopsys.com • http://www.seas.upenn.edu/~jan/spice/spice.overview.html#INTRODUCTION