Applications Engineering

1. Applications Engineering

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5. Stability in High Speed LDO Regulators • An overview of the design relating to low drop out (LDO) regulators. • Design guidelines given for the selection of components based on performance and stability requirements. Typical questions that generally need or get asked: • What are my input and output requirements? • Do I have transient response and magnitude requirements? • Can I use a regulator or do I need a controller? • What do I need for output capacitors? • If my regulator is oscillating, what do I change to stop it? • My regulator response is slow, so how do I speed it up without causing it to oscillate? The following slides introduce the different components and block diagrams for LDO regulators.

6. Block diagram showing dual LDO controller. Startup, Over current, and Shutdown functions. Band Gap reference for setting DC output voltage. Error Amplifier for controlling external N-channel FET. Second channel FET turn on for shorting input to output. Example LDO Controller Block Diagram MC33567 Dual LDO Controller

7. LDO Regulator Block Diagram Error Amplifier Output Driver & Load + Reference A(s) Driver Input Supply Output - B(s) Load Feedback Divider C(s)

8. LDO Regulator Schematic LDO Controller Driver Load Error Amp Feedback Divider Output Capacitor Reference Input

9. Simplified Block Diagram and Transfer Function A(s) B(s) + - C(s)

10. Error Amplifier Detail - A(s) Error Amplifier + A(s) - • Open loop gain greater than 60dB (for less than 0.1% DC output error). • Dominant pole usually set for device, although some devices allow adjusting via compensation pin. • Gain bandwidth usually specified: • Solve for gain bandwidth pole: • Error amp designed to have secondary pole greater than gain bandwidth and usually NOT specified. If not, let: • For stability analysis, assume frequency range: - error amp open loop gain - dominant error amp pole - secondary error amp pole - error amp gain bandwidth

11. Feedback Divider Detail - C(s) • Want to design divider for DC gain of Av and AC gain of 1. • Want V1 independent on reference input, Vr. • Need AC gain of 1 for frequencies greater than low frequency pole of error amp. • LDO controller with fixed output voltage has divider built-in and optimized. • If adding to existing internal divider, follow same guidelines. • Use following design guidelines to obtain these result.

12. Feedback Divider Detail - C(s) - Continued Divider Design Guidelines: - output voltage (known). - reference voltage (known). - DC gain (solve for). - gain bandwidth (from error amp analysis). - error amp input capacitance (use 10pf if not specified). - first divider resistor (solve for). - second divider resistor (solve for). - divider compensation capacitor (solve for). Final solution for divider transfer function - C(s):

13. Output Driver and Load Detail - B(s) Error Amp Output Driver • Transfer function for B(s) shown mainly for reference. • Too complicated to deal with directly. • Will develop design guidelines combining this with other functions to develop overall closed loop transfer function. Output Capacitor Load

14. LDO Closed Loop Transfer Function - H(s) • Combining A(s), B(s), and C(s) into the expression for H(s) yields the following, which is ONLY shown for reference. • The expression for H(s) contains 4 poles and one zero. • It is far too complicated to work from directly. • Stable response requires poles to be in left hand plane. • Analyze pole locations in terms of circuit parameters to make poles be critically or over-damped (no gain peaking in closed loop response).

15. LDO Closed Loop Transfer Function - H(s) - Continued LDO Regulator Stability Design Guidelines: - secondary pole for open loop (solve for). - error amp second pole (known or assumed). - driver pole frequency (if driver built in, let ). - gain bandwidth (from error amp analysis). - maximum driver transconductance gain (if driver built in, then is the output impedance of the regulator). - ESR resistance of output capacitor (solve for). - output capacitor (solve for). - overall loop response time (solve for).

16. LDO Closed Loop Stability Analysis Conclusion • Following design guidelines for voltage divider and stability will yield stable LDO regulator. • Design can be optimized for speed with stable operation. • Little or no overshoot ringing for output transient currents. • Design guidelines can be used in reverse to find error amp gain bandwidth if output capacitor and ESR given. • Guidelines show designer which parameters to change to improve stability and/or loop response time for design and/or actual circuits. • Guidelines help designer to select proper controller/driver for application. • No need to solve for poles/zeros or graphically analyze Bode plots for unity gain phase margins. • All conditional guidelines must be met for stability. • Guidelines do not guarantee perfect operation due to unknown parasitics and unknowns. • Still need to simulate and prototype final design. • Following is a design example demonstrating use of guidelines.

17. Example Design using Guidelines 12V 3.3V MTD3055 NFET 1/2-MC33567 LDO Controller 1.8V Output - Internal Divider Output Cap Load + Error Amp 1.25V Ref Gnd Gnd • Example LDO regulator design demonstrating design guidelines. • Following graphs show closed loop response for changes in circuit. • Circuit at left shows components used for examples. • Design guidelines valid for other circuit configurations as well. • These include PFET controllers and bipolar (NPN and PNP). • Output stability necessary for steady state and transient output currents. Circuit parameters: MC33567 - 5MHz gain bandwidth 50 ohm output impedance Optimized internal divider MTD3055 - 7 mhos transconductance gain 2200 pf input capacitance Load - 0.9A (2 ohms)

18. Frequency Response Analysis

19. Waveform for varying ESR of output capacitor. • Changing the ESR (Rs) of the output capacitor beyond the recommended upper and lower limits tends towards instability (gain peaking). • Making the ESR larger speeds up the closed loop response but may increase the magnitude of the initial transient response due to fast changes in output current. Rs = 30 milliohms appears optimal. (Co = 10,000uF).

20. Waveform for varying output capacitance. • Output capacitance less than lower limit tends towards instability (gain peaking). • Output capacitance greater than lower limit yield same result (choose type and value to meet ESR requirements). Co > 100uF yields same response. (Rs = 30 milliohms)

21. Waveform for changing output driver - gm and Ci. • System optimized for using MTD3055. • Changing output driver FET can impact loop stability (as shown for this example). • If drivers need to be interchangeable, design for higher gain device (gm) and others will be stable (although loop will be slower). MTD3055: gm = 7, Ci = 2200pf MTD3302: gm = 28, Ci = 6600pf (Co = 500uF, Rs = 30mohm)

22. Waveform for varying gain bandwidth of controller • System optimized for gain bandwidth of MC33567 (5MHz). • Making gain bandwidth higher tends towards instability (gain peaking). • If designing with error amp compensation, can achieve stability by varying gain bandwidth. Designed for (Af)o = 5MHz. (MTD3055, Co=500uF, Rs=30mohm)

23. Transient Response in Stable LDO regulators • Transient response for changes in output currents becomes straight forward if LDO regulator closed loop response is stable. • Magnitude of transient depends on rate/magnitude of change and ESR of output capacitor. • Worse case is step change in output current ( ). • Time for transient to return to nominal output is proportional to closed loop response time. • Following is example of previous regulator design transient response for stable and “less than stable” conditions. Typical Transient Response

24. Transient Response Example for Previous Design • From graph, optimized design is critically damped. • Over optimized designs slower but stable. • Designs outside of guidelines tend to oscillate. • Response time and transient amplitude agree with guidelines. (for optimized design) (from graph) MTD3055: gm = 7, Ci = 2200pf (Co = 500uF, Rs = 30mohm) (from graph)

25. Presentation Summary • Specify design output voltage and current (steady state and transient). • Follow design guidelines. • Select controller best suited. • Simulate and prototype circuit. • Adjust components for optimal performance.

26. MicroIntegrationTM A small-package-scale integration effort that combines multiple discrete, logic and MOS devices, which may include passive devices (resistors, capacitors, inductors). • Reduces the total number of discrete & passive components thereby simplifying and or reducing: • - System Cost - Procurement activity • - Design Complexity - Overall size • - Insertion cost - Component count • - Performance inconsistencies - Solder reliability issues To Turn This… Into This…

27. Customer benefits • Lower manufacturing costs • - Assembly line setup time • - Capital equipment utilization • - Equipment costs • Assembled wrong part ( yield) • Reduced insertion costs • Lower materials costs • - Component costs • - Board/substrate costs • - Eliminate parts (eg.: shields) Improve marketplace opportunities - Performance improvement - Size reduction - Reliability improvements - Component interaction reduction Reduce overhead costs - Inventory Purchase Management - Floor and shelf space - Inspection - Component Obsolescence

28. I/O 1 I/O 2 Three types of products comprise the portfolio Transient Protection Arrays Filter circuits +Vcc Drive Circuits

29. MicroIntegrationTM Markets • Automotive • 42/14v systems, in-car entertainment systems • Computing • Power Supplies, Laptop, PC/ MTB PC, Server/ MTB Server, Work Station, Main Frame, Mid-range, Storage, Disk Drives, Peripherals, Printers, Monitors, Scanners • Consumer • Power Supplies, Set-Top Boxes, Game Consoles, Smartcards, MP3s, DVDs, VCRs, Camcorders, Digital Cameras, Appliances, CD/ DVD Players, Handheld Game Boys • Wireless & Portable • Power Supplies/chargers, Mobile Phones, Cordless Phones, Pagers, HH PC/PDA,Smartcards,.

30. Transient Voltage Suppression (TVS)

31. Transient Protection Applications Input voltage I/O IC Card Input Connector IC Protection

32. Filters

33. Transient Protection diodes 0 3 6 Attenuation 9 12 15 Gain(dB) 18 21 24 27 30 1 10 100 1000 3,000 Frequency(MHz) Defines Cut off frequency Low Pass Pi filter with TVS Protection

34. Filter Circuits R #5 #4 #6 #1 #3 R R

35. Drive Circuits

36. Drive Circuits

37. Charge Controller Solution Analog Device MC33340, MC33342 Battery Fast Charge Controllers MicroIntegrationTM

38. Today’s Solution For Lithium-Ion Battery Management

39. Power Sequencer Application: 3.3V/1.8V Power Sequence Market Segment: Computing End Products: Mother Board

40. Lithium Battery Driver Battery charge IC control Market Segment: Wireless,Consumer Application: Lithium Battery Driver End Products: Hand Helds

41. Foldback Current Limiter 9V Output Enable Application: Over Current Protection Market Segment: Consumer End Products: Set Top Box- 3 per box.

42. 12 V Bat 3.3v FET input uP input uP to FET Driver - Automotive Application: Bias Driver Circuit Market Segment: Automotive End Products: Engine Control Module

43. MicroIntegrationTM Packages MicroLeadless™

44. MicroLeadless™ Series 04025 Transistor Package 0402 Diode Package .040 x .020 .040 x .025 0808 Multilead Package .080 x .080

45. MicroLeadless™ Package Platform Can Package 4 RC filter/ESD circuits in 1 Device 80 mils 80 mils

46. Flip chip model vs MicroLeadlessTM model Bump inductance Need library for parasitics Flip chip Bump inductance Bonding inductance Need library for parasitics MicroLeadlessTM Ground inductance

47. Bumped flip chip S21 vs frequency

48. MicroLeadlessTM S21 vs frequency

49. Alex Lara Applications Engineer • BSEE from University of Guadalajara • 5 years experience in applications • Motorola, ON Semiconductor • Engineering Lab Manager • Multiple articles and application notes

50. STANDARD DESCRIPTIVE JOB TITLE FOR AN APPLICATIONS ENGINEER WITHIN THE SEMICONDUCTOR MARKET: Develop new product ideas and specifications; build hardware/software prototypes to verify new product feasibility; design and build new product evaluation and demo boards; develop SPICE macro models and perform system simulations of new products and applications; assist in evaluating and debugging new products; evaluate and build comparative matrices of Competitive products; generate product briefs, data sheets and application notes; conduct on-site design programs of new products with market leading Alpha site companies; and interface with customers and sales staff and provide technical training to Sales and FAE's. Applications Engineering Key Activities • Develop new applications concepts • New designs implementation • Technical Reports • Simulation of applications circuits • Design-ins • Applications Notes Development • Troubleshooting Customer Application needs • SPICE simulations Development