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EKT 221/4 DIGITAL ELECTRONICS II

SUBJECT INTRODUCTION. EKT 221/4 DIGITAL ELECTRONICS II. Lecturer : 1) Mr. Akbah A. Kalifa Email: akbah@unimap.edu.my 2) Dr . Layth Abdulkareem Email: layth@unimap.edu.my 3) Mrs. Saidatul Email:. Grading: Examination = 70% • Test 1 = 10%

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EKT 221/4 DIGITAL ELECTRONICS II

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  1. SUBJECT INTRODUCTION EKT 221/4DIGITAL ELECTRONICS II

  2. Lecturer : 1) Mr. Akbah A. Kalifa Email: akbah@unimap.edu.my 2) Dr. LaythAbdulkareem Email: layth@unimap.edu.my 3) Mrs. Saidatul Email:

  3. Grading: Examination = 70% • Test 1 = 10% • Test 2 = 10% • Final Exam = 50% Course work = 30% • Mini project = 15% • Laboratories = 10% • Assignments / Quizzes = 5%

  4. Main Text Book M. Morris Mano & Charles R. Kime, Logic and Computer Design Fundamentals, 3rd Edition, Prentice Hall.

  5. Other References: • Floyd, Digital Fundamentals, Prentice Hall. • Mano & Ciletti, Digital Design, 4th Ed.

  6. Teaching Plan

  7. Important Dates • Week 6 (13 – 17 Oct 2014) • Test 1 • Week 12 (24 – 28 Nov 2014) • Test 2 • Week 14-15 (08 – 19 Dec 2014) • Mini Project Viva

  8. Mini Project • Groups of 4 (max). • Title can be your own, recommended to work towards the RPS i-project. • Please consult Lecturers or PLVs for clarification on project suitability. • Will be asked to submit proposal.

  9. OUTLINE Chapter 1 : Registers & Register Transfers • Registers, Micro-operations & Implementations • Counters, register cells, buses & serial operations • Counters • Register cell design • Multiplexer and bus-based transfers for multiple registers • Serial transfers & micro-operations

  10. OUTLINE Chapter 2 : Sequencing & Control • State machine • Datapath & control • Algorithmic State Machine (ASM) • Hardwired control • Microprogrammed control

  11. OUTLINE Chapter 3 : Memory Basics • Memory definitions • Random Access Memory (RAM) • Static RAM integrated circuits • Arrays of SRAM IC • Dynamic RAM IC • DRAM types • Arrays of DRAM IC

  12. OUTLINE Chapter 4 : Computer Design Basics • Datapath • ALU • Barrel Shifter • Control Word

  13. Course Outcomes (COs) • CO1: Ability to illustrate a digital system in Register Transfer Language (RTL) form. • CO2: Ability to design sequential systems using Finite State Machine (FSM) and Algorithmic State Machine (ASM) • CO3: Ability to design a digital system with control unit • CO4: Ability to design and simulate using software tool and synthesize a digital design to FPGA device.

  14. What to do BEFORE Lab … • Download the lab sheet and relevant materials from portal / e-learning.

  15. Altera Max+Plus II Altera UP-2 Training Board

  16. THANK YOU

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